Searched refs:TRCEXTINSELR (Results 1 – 3 of 3) sorted by relevance
54 ((offset >= TRCSEQRSTEVR) && (offset <= TRCEXTINSELR)) || in etm4_cfg_map_reg_offset()70 CHECKREG(TRCEXTINSELR, ext_inp); in etm4_cfg_map_reg_offset()
52 #define TRCEXTINSELR 0x120 macro204 CASE_##op((val), TRCEXTINSELR) \
389 etm4x_relaxed_write32(csa, config->ext_inp, TRCEXTINSELR); in etm4_enable_hw()1623 state->trcextinselr = etm4x_read32(csa, TRCEXTINSELR); in etm4_cpu_save()1736 etm4x_relaxed_write32(csa, state->trcextinselr, TRCEXTINSELR); in etm4_cpu_restore()
