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Searched refs:TRCCIDCVRn (Results 1 – 3 of 3) sorted by relevance

/Linux-v5.15/drivers/hwtracing/coresight/
Dcoresight-etm4x.h96 #define TRCCIDCVRn(n) (0x600 + (n * 8)) macro
342 CASE_##op((val), TRCCIDCVRn(0)) \
343 CASE_##op((val), TRCCIDCVRn(1)) \
344 CASE_##op((val), TRCCIDCVRn(2)) \
345 CASE_##op((val), TRCCIDCVRn(3)) \
346 CASE_##op((val), TRCCIDCVRn(4)) \
347 CASE_##op((val), TRCCIDCVRn(5)) \
348 CASE_##op((val), TRCCIDCVRn(6)) \
349 CASE_##op((val), TRCCIDCVRn(7)) \
Dcoresight-etm4x-cfg.c92 } else if ((offset >= TRCCIDCVRn(0)) && (offset <= TRCVMIDCVRn(7))) { in etm4_cfg_map_reg_offset()
97 CHECKREGIDX(TRCCIDCVRn(0), ctxid_pid, idx, off_mask); in etm4_cfg_map_reg_offset()
Dcoresight-etm4x-core.c417 etm4x_relaxed_write64(csa, config->ctxid_pid[i], TRCCIDCVRn(i)); in etm4_enable_hw()
1654 state->trccidcvr[i] = etm4x_read64(csa, TRCCIDCVRn(i)); in etm4_cpu_save()
1760 etm4x_relaxed_write64(csa, state->trccidcvr[i], TRCCIDCVRn(i)); in etm4_cpu_restore()