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Searched refs:TCR_EL1 (Results 1 – 10 of 10) sorted by relevance

/Linux-v5.15/arch/arm64/kvm/hyp/include/hyp/
Dsysreg-sr.h47 ctxt_sys_reg(ctxt, TCR_EL1) = read_sysreg_el1(SYS_TCR); in __sysreg_save_el1_state()
98 write_sysreg_el1(ctxt_sys_reg(ctxt, TCR_EL1), SYS_TCR); in __sysreg_restore_el1_state()
105 write_sysreg_el1((ctxt_sys_reg(ctxt, TCR_EL1) | in __sysreg_restore_el1_state()
146 write_sysreg_el1(ctxt_sys_reg(ctxt, TCR_EL1), SYS_TCR); in __sysreg_restore_el1_state()
/Linux-v5.15/tools/testing/selftests/kvm/include/aarch64/
Dprocessor.h18 #define TCR_EL1 3, 0, 2, 0, 2 macro
/Linux-v5.15/arch/arm64/include/asm/
Dkvm_host.h158 TCR_EL1, /* Translation Control Register */ enumerator
502 case TCR_EL1: *val = read_sysreg_s(SYS_TCR_EL12); break; in __vcpu_read_sys_reg_from_cpu()
547 case TCR_EL1: write_sysreg_s(val, SYS_TCR_EL12); break; in __vcpu_write_sys_reg_to_cpu()
/Linux-v5.15/arch/arm64/kvm/
Dinject_fault.c90 if (vcpu_read_sys_reg(vcpu, TCR_EL1) & TTBCR_EAE) { in inject_abt32()
Dsys_regs.c1549 { SYS_DESC(SYS_TCR_EL1), access_vm_reg, reset_val, TCR_EL1, 0 },
1994 { AA32(LO), Op1( 0), CRn( 2), CRm( 0), Op2( 2), access_vm_reg, NULL, TCR_EL1 },
1996 { AA32(HI), Op1( 0), CRn( 2), CRm( 0), Op2( 3), access_vm_reg, NULL, TCR_EL1 },
/Linux-v5.15/tools/testing/selftests/kvm/lib/aarch64/
Dprocessor.c238 get_reg(vm, vcpuid, ARM64_SYS_REG(TCR_EL1), &tcr_el1); in aarch64_vcpu_setup()
277 set_reg(vm, vcpuid, ARM64_SYS_REG(TCR_EL1), tcr_el1); in aarch64_vcpu_setup()
/Linux-v5.15/arch/arm64/kvm/hyp/nvhe/
Dswitch.c65 write_sysreg_el1(ctxt_sys_reg(ctxt, TCR_EL1), SYS_TCR); in __activate_traps()
/Linux-v5.15/Documentation/arm64/
Dtagged-address-abi.rst16 On AArch64 the ``TCR_EL1.TBI0`` bit is set by default, allowing
/Linux-v5.15/Documentation/admin-guide/kdump/
Dvmcoreinfo.rst486 TCR_EL1.T1SZ
/Linux-v5.15/arch/arm64/
DKconfig753 case-1 TTBR0_EL1 with TCR_EL1.NFD0 == 1.
755 case-3 TTBR1_EL1 with TCR_EL1.NFD1 == 1.
1367 table entries. When enabled in TCR_EL1 (HA and HD bits) on