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Searched refs:TARGET_DEV2G5 (Results 1 – 3 of 3) sorted by relevance

/Linux-v5.15/drivers/net/ethernet/microchip/sparx5/
Dsparx5_main.c57 { TARGET_DEV2G5, 0x10004000, 1 }, /* 0x610004000 */
60 { TARGET_DEV2G5 + 1, 0x10010000, 1 }, /* 0x610010000 */
63 { TARGET_DEV2G5 + 2, 0x1001c000, 1 }, /* 0x61001c000 */
66 { TARGET_DEV2G5 + 6, 0x10028000, 1 }, /* 0x610028000 */
69 { TARGET_DEV2G5 + 7, 0x10034000, 1 }, /* 0x610034000 */
72 { TARGET_DEV2G5 + 8, 0x10040000, 1 }, /* 0x610040000 */
75 { TARGET_DEV2G5 + 9, 0x1004c000, 1 }, /* 0x61004c000 */
78 { TARGET_DEV2G5 + 10, 0x10058000, 1 }, /* 0x610058000 */
81 { TARGET_DEV2G5 + 11, 0x10064000, 1 }, /* 0x610064000 */
84 { TARGET_DEV2G5 + 12, 0x10070000, 1 }, /* 0x610070000 */
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Dsparx5_main_regs.h30 TARGET_DEV2G5 = 37, enumerator
1461 #define DEV2G5_DEV_RST_CTRL(t) __REG(TARGET_DEV2G5, t, 65, 0, 0, 1, 36, 0, 0, 1, 4)
1512 #define DEV2G5_MAC_ENA_CFG(t) __REG(TARGET_DEV2G5, t, 65, 52, 0, 1, 36, 0, 0, 1, 4)
1527 #define DEV2G5_MAC_MODE_CFG(t) __REG(TARGET_DEV2G5, t, 65, 52, 0, 1, 36, 4, 0, 1, 4)
1548 #define DEV2G5_MAC_MAXLEN_CFG(t) __REG(TARGET_DEV2G5, t, 65, 52, 0, 1, 36, 8, 0, 1, 4)
1557 #define DEV2G5_MAC_TAGS_CFG(t) __REG(TARGET_DEV2G5, t, 65, 52, 0, 1, 36, 12, 0, 1, 4)
1584 #define DEV2G5_MAC_TAGS_CFG2(t) __REG(TARGET_DEV2G5, t, 65, 52, 0, 1, 36, 16, 0, 1, 4)
1599 #define DEV2G5_MAC_ADV_CHK_CFG(t) __REG(TARGET_DEV2G5, t, 65, 52, 0, 1, 36, 20, 0, 1, 4)
1608 #define DEV2G5_MAC_IFG_CFG(t) __REG(TARGET_DEV2G5, t, 65, 52, 0, 1, 36, 24, 0, 1, 4)
1635 #define DEV2G5_MAC_HDX_CFG(t) __REG(TARGET_DEV2G5, t, 65, 52, 0, 1, 36, 28, 0, 1, 4)
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Dsparx5_port.c320 sparx5_to_high_dev(port->portno) : TARGET_DEV2G5; in sparx5_port_disable()