Searched refs:State (Results 1 – 25 of 117) sorted by relevance
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47 State is expired50 State has mismatch option54 State is invalid71 State hasn't been fully acquired before use101 State is expired113 State is invalid, perhaps expired
172 Legal Device State Command New Device State
29 Bit 0: PIOA Pin State30 Bit 1: PIOA Output Latch State31 Bit 2: PIOB Pin State32 Bit 3: PIOB Output Latch State
93 Object Management State Machine161 (1) State FSCACHE_OBJECT_INIT.171 (2) State FSCACHE_OBJECT_LOOKING_UP.189 (3) State FSCACHE_OBJECT_CREATING.207 (4) State FSCACHE_OBJECT_AVAILABLE.213 (5) State FSCACHE_OBJECT_ACTIVE.218 (6) State FSCACHE_OBJECT_INVALIDATING.225 (7) State FSCACHE_OBJECT_UPDATING.234 (8) State FSCACHE_OBJECT_LC_DYING.240 (9) State FSCACHE_OBJECT_DYING.[all …]
4 Working-State Power Management
1 Qualcomm Shared Memory State Machine3 The Shared Memory State Machine facilitates broadcasting of single bit state
1 * NXP LPC18xx State Configurable Timer - Pulse Width Modulator driver
4 Power State Coordination Interface (PSCI)7 KVM implements the PSCI (Power State Coordination Interface)
115 To place the chip into the Configuration State The config key (0x55) is written140 To exit the Configuration State the write 0xAA to the CONFIG PORT (0x2E).141 The chip returns to the RUN State. (This is important).
9 1. State Container13 1. State Container
109 This has nothing to do with LED State support for A and E class.118 That includes support for LED State front panel as found on E119 class, and support for the GSP Virtual Front Panel (LED State and
10 SOLOS_ATTR_RO(State)
30 Description: Read-write. Read this file for AP1 (AFU Power State 1) event.38 Description: Read-write. Read this file for AP2 (AFU Power State 2) event.
40 Describes the Device State class exposed by BIOS which can be
61 Description: State of the card: "unused", "used", "error".
154 2. C-State transition157 When a CPU goes idle and enters a C-State the CPU buffers need to be160 a C-State.176 The buffer clear is only invoked before entering the C-State to prevent
12 - Output Three-State Control
38 37 State Configurable Timer (SCT)
296 U8 State; /*0x00 */ member
46 The presence of Solid State Drives (SSD) can make this driver to fail loading,
51 Description: State of the transport layer used for communication with the
177 tristate "Qualcomm Shared Memory State Machine"182 Say yes here to support the Qualcomm Shared Memory State Machine.
51 See "ITS Reset State" section.195 ITS Reset State:
42 2. Event State Buffer (ESB)44 Each source is associated with an Event State Buffer (ESB) with
30 "fsl,imx7d-iomuxc-lpsr" for Low Power State Retention IOMUXC controller.
