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Searched refs:SPLL_CTL (Results 1 – 5 of 5) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/i915/display/
Dintel_dpll_mgr.c593 intel_de_write(dev_priv, SPLL_CTL, pll->state.hw_state.spll); in hsw_ddi_spll_enable()
594 intel_de_posting_read(dev_priv, SPLL_CTL); in hsw_ddi_spll_enable()
622 val = intel_de_read(dev_priv, SPLL_CTL); in hsw_ddi_spll_disable()
623 intel_de_write(dev_priv, SPLL_CTL, val & ~SPLL_PLL_ENABLE); in hsw_ddi_spll_disable()
624 intel_de_posting_read(dev_priv, SPLL_CTL); in hsw_ddi_spll_disable()
667 val = intel_de_read(dev_priv, SPLL_CTL); in hsw_ddi_spll_get_hw_state()
Dintel_display_power.c5331 I915_STATE_WARN(intel_de_read(dev_priv, SPLL_CTL) & SPLL_PLL_ENABLE, in assert_can_disable_lcpll()
Dintel_display.c5647 u32 ctl = intel_de_read(dev_priv, SPLL_CTL); in spll_uses_pch_ssc()
/Linux-v5.15/drivers/gpu/drm/i915/gvt/
Dhandlers.c480 switch (vgpu_vreg_t(vgpu, SPLL_CTL) & SPLL_FREQ_MASK) { in bdw_vgpu_get_dp_bitrate()
492 vgpu->id, port_name(port), vgpu_vreg_t(vgpu, SPLL_CTL)); in bdw_vgpu_get_dp_bitrate()
2729 MMIO_D(SPLL_CTL, D_ALL); in init_generic_mmio_info()
/Linux-v5.15/drivers/gpu/drm/i915/
Di915_reg.h10335 #define SPLL_CTL _MMIO(0x46020) macro