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Searched refs:SDMA1_STATUS_REG__MC_RD_NO_POLL_IDLE__SHIFT (Results 1 – 10 of 10) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/sdma1/
Dsdma1_4_0_sh_mask.h501 #define SDMA1_STATUS_REG__MC_RD_NO_POLL_IDLE__SHIFT 0x16 macro
Dsdma1_4_2_2_sh_mask.h503 #define SDMA1_STATUS_REG__MC_RD_NO_POLL_IDLE__SHIFT … macro
Dsdma1_4_2_sh_mask.h499 #define SDMA1_STATUS_REG__MC_RD_NO_POLL_IDLE__SHIFT … macro
/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_0_sh_mask.h1468 #define SDMA1_STATUS_REG__MC_RD_NO_POLL_IDLE__SHIFT 0x16 macro
Doss_2_4_sh_mask.h1632 #define SDMA1_STATUS_REG__MC_RD_NO_POLL_IDLE__SHIFT 0x16 macro
Doss_3_0_1_sh_mask.h2150 #define SDMA1_STATUS_REG__MC_RD_NO_POLL_IDLE__SHIFT 0x16 macro
Doss_3_0_sh_mask.h2454 #define SDMA1_STATUS_REG__MC_RD_NO_POLL_IDLE__SHIFT 0x16 macro
/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/sdma/
Dsdma_4_4_0_sh_mask.h3006 #define SDMA1_STATUS_REG__MC_RD_NO_POLL_IDLE__SHIFT … macro
/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_3_0_sh_mask.h3090 #define SDMA1_STATUS_REG__MC_RD_NO_POLL_IDLE__SHIFT … macro
Dgc_10_1_0_sh_mask.h2981 #define SDMA1_STATUS_REG__MC_RD_NO_POLL_IDLE__SHIFT … macro