Searched refs:SDMA1 (Results 1 – 10 of 10) sorted by relevance
| /Linux-v5.15/drivers/gpu/drm/amd/amdgpu/ |
| D | sdma_v4_0.c | 103 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_CLK_CTRL, 0xffffffff, 0x3f000100), 104 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_GFX_IB_CNTL, 0x800f0100, 0x00000100), 105 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_GFX_RB_WPTR_POLL_CNTL, 0x0000fff0, 0x00403000), 106 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_PAGE_IB_CNTL, 0x800f0100, 0x00000100), 107 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_PAGE_RB_WPTR_POLL_CNTL, 0x0000fff0, 0x00403000), 108 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_POWER_CNTL, 0x003ff000, 0x0003c000), 109 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC0_IB_CNTL, 0x800f0100, 0x00000100), 110 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC0_RB_WPTR_POLL_CNTL, 0x0000fff0, 0x00403000), 111 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC1_IB_CNTL, 0x800f0100, 0x00000100), 112 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC1_RB_WPTR_POLL_CNTL, 0x0000fff0, 0x00403000), [all …]
|
| D | amdgpu_amdkfd_arcturus.c | 88 sdma_engine_reg_base = SOC15_REG_OFFSET(SDMA1, 0, in get_sdma_rlc_reg_offset()
|
| D | amdgpu_amdkfd_gfx_v10.c | 186 SOC15_REG_OFFSET(SDMA1, 0, in get_sdma_rlc_reg_offset()
|
| D | amdgpu_amdkfd_gfx_v9.c | 212 sdma_engine_reg_base = SOC15_REG_OFFSET(SDMA1, 0, in get_sdma_rlc_reg_offset()
|
| D | sdma_v2_4.c | 287 ref_and_mask = REG_SET_FIELD(ref_and_mask, GPU_HDP_FLUSH_DONE, SDMA1, 1); in sdma_v2_4_ring_emit_hdp_flush()
|
| D | nv.c | 403 { SOC15_REG_ENTRY(SDMA1, 0, mmSDMA1_STATUS_REG)},
|
| D | soc15.c | 408 { SOC15_REG_ENTRY(SDMA1, 0, mmSDMA1_STATUS_REG)},
|
| D | sdma_v3_0.c | 461 ref_and_mask = REG_SET_FIELD(ref_and_mask, GPU_HDP_FLUSH_DONE, SDMA1, 1); in sdma_v3_0_ring_emit_hdp_flush()
|
| /Linux-v5.15/drivers/gpu/drm/radeon/ |
| D | cik_sdma.c | 179 ref_and_mask = SDMA1; in cik_sdma_hdp_flush_ring_emit()
|
| D | cikd.h | 861 #define SDMA1 (1 << 11) macro
|