Searched refs:SDMA0_PHASE0_QUANTUM__VALUE__SHIFT (Results 1 – 16 of 16) sorted by relevance
359 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT)) { in cik_ctx_switch_enable()366 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT); in cik_ctx_switch_enable()374 value << SDMA0_PHASE0_QUANTUM__VALUE__SHIFT | in cik_ctx_switch_enable()
568 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT)) { in sdma_v3_0_ctx_switch_enable()575 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT); in sdma_v3_0_ctx_switch_enable()583 value << SDMA0_PHASE0_QUANTUM__VALUE__SHIFT | in sdma_v3_0_ctx_switch_enable()
527 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT)) { in sdma_v5_2_ctx_switch_enable()534 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT); in sdma_v5_2_ctx_switch_enable()542 value << SDMA0_PHASE0_QUANTUM__VALUE__SHIFT | in sdma_v5_2_ctx_switch_enable()
638 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT)) { in sdma_v5_0_ctx_switch_enable()645 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT); in sdma_v5_0_ctx_switch_enable()653 value << SDMA0_PHASE0_QUANTUM__VALUE__SHIFT | in sdma_v5_0_ctx_switch_enable()
1074 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT)) { in sdma_v4_0_ctx_switch_enable()1081 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT); in sdma_v4_0_ctx_switch_enable()1089 value << SDMA0_PHASE0_QUANTUM__VALUE__SHIFT | in sdma_v4_0_ctx_switch_enable()
596 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT … macro
597 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro
605 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT … macro
599 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT … macro
1014 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro
1104 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro
1124 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro
1630 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro
292 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT … macro
312 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT … macro
311 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT … macro
