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Searched refs:SDMA0_PHASE0_QUANTUM__UNIT__SHIFT (Results 1 – 16 of 16) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/amdgpu/
Dcik_sdma.c364 SDMA0_PHASE0_QUANTUM__UNIT__SHIFT)) { in cik_ctx_switch_enable()
368 SDMA0_PHASE0_QUANTUM__UNIT__SHIFT); in cik_ctx_switch_enable()
375 unit << SDMA0_PHASE0_QUANTUM__UNIT__SHIFT; in cik_ctx_switch_enable()
Dsdma_v3_0.c573 SDMA0_PHASE0_QUANTUM__UNIT__SHIFT)) { in sdma_v3_0_ctx_switch_enable()
577 SDMA0_PHASE0_QUANTUM__UNIT__SHIFT); in sdma_v3_0_ctx_switch_enable()
584 unit << SDMA0_PHASE0_QUANTUM__UNIT__SHIFT; in sdma_v3_0_ctx_switch_enable()
Dsdma_v5_2.c532 SDMA0_PHASE0_QUANTUM__UNIT__SHIFT)) { in sdma_v5_2_ctx_switch_enable()
536 SDMA0_PHASE0_QUANTUM__UNIT__SHIFT); in sdma_v5_2_ctx_switch_enable()
543 unit << SDMA0_PHASE0_QUANTUM__UNIT__SHIFT; in sdma_v5_2_ctx_switch_enable()
Dsdma_v5_0.c643 SDMA0_PHASE0_QUANTUM__UNIT__SHIFT)) { in sdma_v5_0_ctx_switch_enable()
647 SDMA0_PHASE0_QUANTUM__UNIT__SHIFT); in sdma_v5_0_ctx_switch_enable()
654 unit << SDMA0_PHASE0_QUANTUM__UNIT__SHIFT; in sdma_v5_0_ctx_switch_enable()
Dsdma_v4_0.c1079 SDMA0_PHASE0_QUANTUM__UNIT__SHIFT)) { in sdma_v4_0_ctx_switch_enable()
1083 SDMA0_PHASE0_QUANTUM__UNIT__SHIFT); in sdma_v4_0_ctx_switch_enable()
1090 unit << SDMA0_PHASE0_QUANTUM__UNIT__SHIFT; in sdma_v4_0_ctx_switch_enable()
/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/sdma0/
Dsdma0_4_1_sh_mask.h595 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT … macro
Dsdma0_4_0_sh_mask.h596 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT 0x0 macro
Dsdma0_4_2_2_sh_mask.h604 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT … macro
Dsdma0_4_2_sh_mask.h598 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT … macro
/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_0_sh_mask.h1012 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT 0x0 macro
Doss_2_4_sh_mask.h1102 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT 0x0 macro
Doss_3_0_1_sh_mask.h1122 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT 0x0 macro
Doss_3_0_sh_mask.h1628 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT 0x0 macro
/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/sdma/
Dsdma_4_4_0_sh_mask.h291 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT … macro
/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_3_0_sh_mask.h311 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT … macro
Dgc_10_1_0_sh_mask.h310 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT … macro