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Searched refs:SCL (Results 1 – 25 of 73) sorted by relevance

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/Linux-v5.15/drivers/i2c/busses/
Di2c-acorn.c19 #define SCL 0x02 macro
32 u_int ioc_control = ioc_readb(IOC_CONTROL) & ~(SCL | SDA); in ioc_setscl()
36 ones |= SCL; in ioc_setscl()
38 ones &= ~SCL; in ioc_setscl()
47 u_int ioc_control = ioc_readb(IOC_CONTROL) & ~(SCL | SDA); in ioc_setsda()
62 return (ioc_readb(IOC_CONTROL) & SCL) != 0; in ioc_getscl()
87 force_ones = FORCE_ONES | SCL | SDA; in i2c_ioc_init()
Di2c-versatile.c20 #define SCL (1 << 0) macro
40 writel(SCL, i2c->base + (state ? I2C_CONTROLS : I2C_CONTROLC)); in i2c_versatile_setscl()
52 return !!(readl(i2c->base + I2C_CONTROL) & SCL); in i2c_versatile_getscl()
79 writel(SCL | SDA, i2c->base + I2C_CONTROLS); in i2c_versatile_probe()
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dce/
Ddce_i2c_sw.c31 #define SCL false macro
87 if (read_bit_from_ddc(ddc, SCL)) in wait_for_scl_high_sw()
115 write_bit_to_ddc(ddc_handle, SCL, true); in write_byte_sw()
120 write_bit_to_ddc(ddc_handle, SCL, false); in write_byte_sw()
136 write_bit_to_ddc(ddc_handle, SCL, true); in write_byte_sw()
147 write_bit_to_ddc(ddc_handle, SCL, false); in write_byte_sw()
170 write_bit_to_ddc(ddc_handle, SCL, true); in read_byte_sw()
178 write_bit_to_ddc(ddc_handle, SCL, false); in read_byte_sw()
199 write_bit_to_ddc(ddc_handle, SCL, true); in read_byte_sw()
204 write_bit_to_ddc(ddc_handle, SCL, false); in read_byte_sw()
[all …]
Ddce_transform.h76 SRI(SCL_MODE, SCL, id), \
77 SRI(SCL_TAP_CONTROL, SCL, id), \
78 SRI(SCL_CONTROL, SCL, id), \
79 SRI(SCL_BYPASS_CONTROL, SCL, id), \
80 SRI(EXT_OVERSCAN_LEFT_RIGHT, SCL, id), \
81 SRI(EXT_OVERSCAN_TOP_BOTTOM, SCL, id), \
82 SRI(SCL_VERT_FILTER_CONTROL, SCL, id), \
83 SRI(SCL_HORZ_FILTER_CONTROL, SCL, id), \
84 SRI(SCL_COEF_RAM_SELECT, SCL, id), \
85 SRI(SCL_COEF_RAM_TAP_DATA, SCL, id), \
[all …]
/Linux-v5.15/arch/arm/boot/dts/
Dste-dbx5x0-pinctrl.dtsi132 pins = "GPIO147_C15", "GPIO148_B16"; /* SDA/SCL */
139 pins = "GPIO147_C15", "GPIO148_B16"; /* SDA/SCL */
152 pins = "GPIO16_AD3", "GPIO17_AD4"; /* SDA/SCL */
159 pins = "GPIO16_AD3", "GPIO17_AD4"; /* SDA/SCL */
172 pins = "GPIO8_AD5", "GPIO9_AE4"; /* SDA/SCL */
179 pins = "GPIO8_AD5", "GPIO9_AE4"; /* SDA/SCL */
190 pins = "GPIO10_AF5", "GPIO11_AG4"; /* SDA/SCL */
197 pins = "GPIO10_AF5", "GPIO11_AG4"; /* SDA/SCL */
210 pins = "GPIO229_AG7", "GPIO230_AF7"; /* SDA/SCL */
217 pins = "GPIO229_AG7", "GPIO230_AF7"; /* SDA/SCL */
[all …]
Dtegra30-apalis-eval.dts75 * GEN1_I2C: I2C1_SDA/SCL on MXM3 pin 209/211 (e.g. RTC on carrier
97 * CAM_I2C: I2C3_SDA/SCL on MXM3 pin 201/203 (e.g. camera sensor on
105 /* DDC: I2C2_SDA/SCL on MXM3 pin 205/207 (e.g. display EDID) */
Dtegra124-apalis-eval.dts68 * GEN1_I2C: I2C1_SDA/SCL on MXM3 pin 209/211 (e.g. RTC on carrier
88 * GEN2_I2C: I2C2_SDA/SCL (DDC) on MXM3 pin 205/207 (e.g. display EDID)
95 * CAM_I2C: I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor
Dtegra124-apalis-v1.2-eval.dts69 * GEN1_I2C: I2C1_SDA/SCL on MXM3 pin 209/211 (e.g. RTC on carrier
91 * CAM_I2C: I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor
100 * I2C4 (DDC): I2C4_SDA/SCL (DDC) on MXM3 pin 205/207
Dtegra30-apalis-v1.1-eval.dts76 * GEN1_I2C: I2C1_SDA/SCL on MXM3 pin 209/211 (e.g. RTC on carrier
98 * CAM_I2C: I2C3_SDA/SCL on MXM3 pin 201/203 (e.g. camera sensor on
106 /* DDC: I2C2_SDA/SCL on MXM3 pin 205/207 (e.g. display EDID) */
Domap4-sdp-es23plus.dts7 /* SDP boards with 4430 ES2.3+ or 4460 have external pullups on SCL & SDA */
Dexynos4412-i9305.dts18 /* SCL and SDA pins are swapped */
Domap4-panda-a4.dts10 /* Pandaboard Rev A4+ have external pullups on SCL & SDA */
Dimx6q-apalis-ixora.dts134 /* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */
164 * I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor on carrier
Dimx6q-apalis-ixora-v1.1.dts135 /* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */
160 * I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor on carrier
Dimx6q-apalis-eval.dts130 /* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */
160 * I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor on carrier
Dgr-peach-audiocamerashield.dtsi23 /* P1_2 as SCL; P1_3 as SDA */
Dimx23-sansa.dts180 &gpio1 22 0 /* SCL */
191 &gpio0 30 0 /* SCL */
/Linux-v5.15/drivers/rtc/
Drtc-rs5c313.c73 #define SCL SCSPTR1_SPB0DT macro
95 scsptr1_data = __raw_readb(SCSPTR1) | SCL; /* SCL:H */ in rs5c313_init_port()
116 scsptr1_data &= ~SCL; /* SCL:L */ in rs5c313_write_data()
119 scsptr1_data |= SCL; /* SCL:H */ in rs5c313_write_data()
136 scsptr1_data &= ~SCL; /* SCL:L */ in rs5c313_read_data()
139 scsptr1_data |= SCL; /* SCL:H */ in rs5c313_read_data()
/Linux-v5.15/Documentation/i2c/
Dgpio-fault-injection.rst23 By reading this file, you get the current state of SCL. By writing, you can
25 "echo 0 > scl" you force SCL low and thus, no communication will be possible
27 the condition of SCL being unresponsive and report an error to the upper
62 being pulled low by the device while SCL is high. So, similar to the "sda" file
65 SDA after toggling SCL.
81 register 0x00 (if it has registers) when further clock pulses happen on SCL.
99 Arbitration lost is achieved by waiting for SCL going down by the master under
104 should be detected beforehand. Also note, that SCL going down is monitored
129 Start of a transfer is detected by waiting for SCL going down by the master
/Linux-v5.15/Documentation/devicetree/bindings/i2c/
Di2c.txt38 Number of nanoseconds the SCL signal takes to fall; t(f) in the I2C
42 Number of nanoseconds the IP core additionally needs to setup SCL.
45 Number of nanoseconds the SCL signal takes to rise; t(r) in the I2C
76 add extra pinctrl to configure SCL/SDA pins to GPIO function for bus
80 specify the gpio related to SCL pin. Used for GPIO bus recovery.
Di2c-s3c2410.txt20 - gpios: The order of the gpios should be the following: <SDA, SCL>.
45 &gpd1 3 0 /* SCL */>;
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/gpio/
Dddc_regs.h171 DDC_I2C_REG_LIST(SCL)\
190 DDC_REG_LIST_DCN2(SCL)\
/Linux-v5.15/Documentation/i2c/muxes/
Di2c-mux-gpio.rst16 | | SCL/SDA | |-------------- | |
25 SCL/SDA of the master I2C bus is multiplexed to bus segment 1..M
/Linux-v5.15/Documentation/i2c/busses/
Di2c-parport.rst57 SCL ----------x--------o |-----------x------------------- pin 2
97 - Obviously you cannot read SCL (so it's not really standard-compliant).
112 SCL ----------x--------x--| o---x------------------------ pin 15
/Linux-v5.15/Documentation/hwmon/
Dmax127.rst27 communication among multiple devices using SDA and SCL lines.

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