Searched refs:RREG32_SOC15_OFFSET (Results 1 – 9 of 9) sorted by relevance
| /Linux-v5.15/drivers/gpu/drm/amd/amdgpu/ |
| D | mmhub_v9_4.c | 163 tmp = RREG32_SOC15_OFFSET( in mmhub_v9_4_init_system_aperture_regs() 180 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, in mmhub_v9_4_init_tlb_regs() 208 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmVML2PF0_VM_L2_CNTL, in mmhub_v9_4_init_cache_regs() 226 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmVML2PF0_VM_L2_CNTL2, in mmhub_v9_4_init_cache_regs() 262 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmVML2VC0_VM_CONTEXT0_CNTL, in mmhub_v9_4_enable_system_domain() 304 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmVML2VC0_VM_CONTEXT1_CNTL, in mmhub_v9_4_setup_vmid_config() 414 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, in mmhub_v9_4_gart_disable() 427 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmVML2PF0_VM_L2_CNTL, in mmhub_v9_4_gart_disable() 450 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, in mmhub_v9_4_set_fault_enable_default() 561 def = data = RREG32_SOC15_OFFSET(MMHUB, 0, in mmhub_v9_4_update_medium_grain_clock_gating() [all …]
|
| D | soc15_common.h | 58 #define RREG32_SOC15_OFFSET(ip, inst, reg, offset) \ macro
|
| D | gfxhub_v1_0.c | 264 tmp = RREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT1_CNTL, i); in gfxhub_v1_0_setup_vmid_config()
|
| D | gfxhub_v2_0.c | 291 tmp = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_CNTL, i); in gfxhub_v2_0_setup_vmid_config()
|
| D | gfxhub_v2_1.c | 300 tmp = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_CNTL, i); in gfxhub_v2_1_setup_vmid_config()
|
| D | mmhub_v2_0.c | 375 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT1_CNTL, i); in mmhub_v2_0_setup_vmid_config()
|
| D | mmhub_v2_3.c | 288 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT1_CNTL, i); in mmhub_v2_3_setup_vmid_config()
|
| D | mmhub_v1_0.c | 245 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT1_CNTL, i); in mmhub_v1_0_setup_vmid_config()
|
| D | mmhub_v1_7.c | 278 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, regVM_CONTEXT1_CNTL, i); in mmhub_v1_7_setup_vmid_config()
|