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Searched refs:RIRB_CONTROL__RESPONSE_INTERRUPT_CONTROL__SHIFT (Results 1 – 11 of 11) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_8_0_sh_mask.h11510 #define RIRB_CONTROL__RESPONSE_INTERRUPT_CONTROL__SHIFT 0x0 macro
Ddce_11_0_sh_mask.h12618 #define RIRB_CONTROL__RESPONSE_INTERRUPT_CONTROL__SHIFT 0x0 macro
Ddce_10_0_sh_mask.h12612 #define RIRB_CONTROL__RESPONSE_INTERRUPT_CONTROL__SHIFT 0x0 macro
Ddce_11_2_sh_mask.h13234 #define RIRB_CONTROL__RESPONSE_INTERRUPT_CONTROL__SHIFT 0x0 macro
Ddce_12_0_sh_mask.h56084 #define RIRB_CONTROL__RESPONSE_INTERRUPT_CONTROL__SHIFT … macro
/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_sh_mask.h27113 #define RIRB_CONTROL__RESPONSE_INTERRUPT_CONTROL__SHIFT … macro
Ddcn_3_0_1_sh_mask.h227 #define RIRB_CONTROL__RESPONSE_INTERRUPT_CONTROL__SHIFT … macro
Ddcn_1_0_sh_mask.h959 #define RIRB_CONTROL__RESPONSE_INTERRUPT_CONTROL__SHIFT … macro
Ddcn_3_0_2_sh_mask.h54157 #define RIRB_CONTROL__RESPONSE_INTERRUPT_CONTROL__SHIFT … macro
Ddcn_2_0_0_sh_mask.h59156 #define RIRB_CONTROL__RESPONSE_INTERRUPT_CONTROL__SHIFT … macro
Ddcn_3_0_0_sh_mask.h62732 #define RIRB_CONTROL__RESPONSE_INTERRUPT_CONTROL__SHIFT … macro