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Searched refs:RING_TAIL (Results 1 – 12 of 12) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/i915/
Dintel_uncore.c953 RING_TAIL(RENDER_RING_BASE), /* 0x2000 (base) */
956 RING_TAIL(GEN6_BSD_RING_BASE), /* 0x12000 (base) */
957 RING_TAIL(VEBOX_RING_BASE), /* 0x1a000 (base) */
958 RING_TAIL(BLT_RING_BASE), /* 0x22000 (base) */
963 RING_TAIL(RENDER_RING_BASE), /* 0x2000 (base) */
967 RING_TAIL(BLT_RING_BASE), /* 0x22000 (base) */
969 RING_TAIL(GEN11_BSD_RING_BASE), /* 0x1C0000 (base) */
971 RING_TAIL(GEN11_BSD2_RING_BASE), /* 0x1C4000 (base) */
973 RING_TAIL(GEN11_VEBOX_RING_BASE), /* 0x1C8000 (base) */
975 RING_TAIL(GEN11_BSD3_RING_BASE), /* 0x1D0000 (base) */
[all …]
Di915_gpu_error.c1165 ee->tail = ENGINE_READ(engine, RING_TAIL); in engine_record_registers()
Di915_reg.h2528 #define RING_TAIL(base) _MMIO((base) + 0x30) macro
/Linux-v5.15/drivers/gpu/drm/i915/gt/
Dintel_ring_submission.c167 ENGINE_WRITE_FW(engine, RING_HEAD, ENGINE_READ_FW(engine, RING_TAIL)); in stop_ring()
176 ENGINE_WRITE_FW(engine, RING_TAIL, 0); in stop_ring()
223 ENGINE_WRITE_FW(engine, RING_TAIL, ring->head); in xcs_resume()
224 ENGINE_POSTING_READ(engine, RING_TAIL); in xcs_resume()
242 ENGINE_WRITE_FW(engine, RING_TAIL, ring->tail); in xcs_resume()
243 ENGINE_POSTING_READ(engine, RING_TAIL); in xcs_resume()
258 ENGINE_READ(engine, RING_TAIL), ring->tail, in xcs_resume()
324 ENGINE_READ_FW(engine, RING_TAIL), in reset_prepare()
333 ENGINE_READ_FW(engine, RING_TAIL), in reset_prepare()
432 ENGINE_WRITE(request->engine, RING_TAIL, in i9xx_submit_request()
Dintel_engine_cs.c1115 ENGINE_READ_FW(engine, RING_TAIL) & TAIL_ADDR); in intel_engine_stop_cs()
1123 (ENGINE_READ_FW(engine, RING_TAIL) & TAIL_ADDR)) in intel_engine_stop_cs()
1238 (ENGINE_READ(engine, RING_TAIL) & TAIL_ADDR)) in ring_is_idle()
1481 ENGINE_READ(engine, RING_TAIL) & TAIL_ADDR); in intel_engine_print_registers()
Dintel_gt.c163 intel_uncore_write(uncore, RING_TAIL(base), 0); in init_unused_ring()
Dselftest_lrc.c280 i915_mmio_reg_offset(RING_TAIL(engine->mmio_base)), in live_lrc_fixed()
407 *cs++ = i915_mmio_reg_offset(RING_TAIL(engine->mmio_base)); in __live_lrc_state()
Dintel_execlists_submission.c1964 ENGINE_READ(engine, RING_TAIL) & TAIL_ADDR, in process_csb()
/Linux-v5.15/drivers/gpu/drm/i810/
Di810_drv.h163 I810_WRITE(LP_RING + RING_TAIL, outring); \
196 #define RING_TAIL 0x00 macro
Di810_dma.c278 ring->tail = I810_READ(LP_RING + RING_TAIL); in i810_kernel_lost_context()
/Linux-v5.15/drivers/gpu/drm/i915/gvt/
Dscheduler.c969 vgpu_vreg_t(vgpu, RING_TAIL(ring_base)) = tail; in update_guest_context()
Dhandlers.c2224 MMIO_RING_DFH(RING_TAIL, D_ALL, 0, NULL, NULL); in init_generic_mmio_info()