| /Linux-v5.15/drivers/net/wireless/ath/ath9k/ |
| D | ar9003_wow.c | 161 REG_RMW(ah, AR_WOW_LENGTH1, set, clr); in ath9k_hw_wow_apply_pattern()
166 REG_RMW(ah, AR_WOW_LENGTH2, set, clr); in ath9k_hw_wow_apply_pattern()
171 REG_RMW(ah, AR_WOW_LENGTH3, set, clr); in ath9k_hw_wow_apply_pattern()
176 REG_RMW(ah, AR_WOW_LENGTH4, set, clr); in ath9k_hw_wow_apply_pattern()
229 REG_RMW(ah, AR_PCIE_PM_CTRL, AR_PMCTRL_WOW_PME_CLR, in ath9k_hw_wow_wakeup()
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| D | eeprom_4k.c | 705 REG_RMW(ah, AR_PHY_SWITCH_CHAIN_0, in ath9k_hw_4k_set_gain()
708 REG_RMW(ah, AR_PHY_TIMING_CTRL4(0), in ath9k_hw_4k_set_gain()
974 REG_RMW(ah, AR_PHY_RF_CTL4, in ath9k_hw_4k_set_board_values()
1016 REG_RMW(ah, AR_PHY_TX_PWRCTRL8, pwrctrl, clr); in ath9k_hw_4k_set_board_values()
1017 REG_RMW(ah, AR_PHY_TX_PWRCTRL10, pwrctrl, clr); in ath9k_hw_4k_set_board_values()
1018 REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL12, pwrctrl, clr); in ath9k_hw_4k_set_board_values()
1023 REG_RMW(ah, AR_PHY_TX_PWRCTRL9, pwrctrl, clr); in ath9k_hw_4k_set_board_values()
1028 REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL11, pwrctrl, clr); in ath9k_hw_4k_set_board_values()
1029 REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL13, pwrctrl, clr); in ath9k_hw_4k_set_board_values()
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| D | hw.c | 1148 REG_RMW(ah, AR_USEC, in ath9k_hw_init_global_settings()
1155 REG_RMW(ah, AR_TXSIFS, in ath9k_hw_init_global_settings()
1208 REG_RMW(ah, AR_TXCFG, AR_TXCFG_DMASZ_128B, AR_TXCFG_DMASZ_MASK); in ath9k_hw_set_dma()
1225 REG_RMW(ah, AR_RXCFG, AR_RXCFG_DMASZ_128B, AR_RXCFG_DMASZ_MASK); in ath9k_hw_set_dma()
1293 REG_RMW(ah, AR_STA_ID1, set, mask); in ath9k_hw_set_operating_mode()
1714 REG_RMW(ah, AR_STA_ID1, macStaId1 in ath9k_hw_reset_opmode()
1776 REG_RMW(ah, AR_CFG, AR_CFG_SWRB | AR_CFG_SWTB, 0); in ath9k_hw_init_desc()
2714 REG_RMW(ah, addr, (type << gpio_shift), in ath9k_hw_gpio_cfg_output_mux()
2753 REG_RMW(ah, AR7010_GPIO_OE, gpio_set << gpio_shift, in ath9k_hw_gpio_cfg_wmac()
2757 REG_RMW(ah, AR_GPIO_OE_OUT, gpio_set << gpio_shift, in ath9k_hw_gpio_cfg_wmac()
[all …]
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| D | calib.c | 279 REG_RMW(ah, ah->nf_regs[i], in ath9k_hw_loadnf()
360 REG_RMW(ah, ah->nf_regs[i], in ath9k_hw_loadnf()
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| D | ar9002_phy.c | 433 REG_RMW(ah, AR_PHY_SWITCH_CHAIN_0, 0, 0xf0000000); in ar9002_hw_set_bt_ant_diversity()
452 REG_RMW(ah, AR_PHY_SWITCH_CHAIN_0, 0, 0xf0000000); in ar9002_hw_set_bt_ant_diversity()
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| D | hw.h | 88 #define REG_RMW(_ah, _reg, _set, _clr) \ macro
124 REG_RMW(_a, _r, (((_v) << _f##_S) & _f), (_f))
128 REG_RMW(_a, _r, (_f), 0)
130 REG_RMW(_a, _r, 0, (_f))
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| D | ar9003_phy.c | 819 REG_RMW(ah, AR_PHY_65NM_CH0_RXTX2, in ar9003_doubler_fix()
822 REG_RMW(ah, AR_PHY_65NM_CH1_RXTX2, in ar9003_doubler_fix()
825 REG_RMW(ah, AR_PHY_65NM_CH2_RXTX2, in ar9003_doubler_fix()
852 REG_RMW(ah, AR_PHY_65NM_CH0_RXTX2, 0, in ar9003_doubler_fix()
855 REG_RMW(ah, AR_PHY_65NM_CH1_RXTX2, 0, in ar9003_doubler_fix()
858 REG_RMW(ah, AR_PHY_65NM_CH2_RXTX2, 0, in ar9003_doubler_fix()
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| D | eeprom_def.c | 439 REG_RMW(ah, AR_PHY_GAIN_2GHZ + regChainOffset, in ath9k_hw_def_set_gain()
442 REG_RMW(ah, AR_PHY_GAIN_2GHZ + regChainOffset, in ath9k_hw_def_set_gain()
456 REG_RMW(ah, AR_PHY_RXGAIN + regChainOffset, in ath9k_hw_def_set_gain()
459 REG_RMW(ah, AR_PHY_GAIN_2GHZ + regChainOffset, in ath9k_hw_def_set_gain()
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| D | btcoex.c | 407 REG_RMW(ah, AR_GPIO_PDPU, in ath9k_hw_btcoex_enable()
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| D | ar9003_eeprom.c | 4815 REG_RMW(ah, AR_PHY_TPC_11_B0, in ar9003_hw_power_control_override()
4819 REG_RMW(ah, AR_PHY_TPC_11_B1, in ar9003_hw_power_control_override()
4823 REG_RMW(ah, AR_PHY_TPC_11_B2, in ar9003_hw_power_control_override()
4828 REG_RMW(ah, AR_PHY_TPC_6_B0, in ar9003_hw_power_control_override()
4832 REG_RMW(ah, AR_PHY_TPC_6_B1, in ar9003_hw_power_control_override()
4836 REG_RMW(ah, AR_PHY_TPC_6_B2, in ar9003_hw_power_control_override()
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| D | eeprom.c | 31 REG_RMW(ah, reg, ((val << shift) & mask), mask); in ath9k_hw_analog_shift_rmw()
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