Searched refs:REG_BASE (Results 1 – 7 of 7) sorted by relevance
/Linux-v5.15/arch/mips/n64/ |
D | init.c | 53 #define REG_BASE ((u32 *) CKSEG1ADDR(0x4400000)) macro 57 __raw_writel(value, REG_BASE + reg); in n64rdp_write_reg() 60 #undef REG_BASE
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/Linux-v5.15/drivers/atm/ |
D | midway.h | 23 #define REG_BASE 0x00040000 /* offset of Midway register area */ macro
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D | iphase.h | 632 #define REG_BASE IPHASE5575_BUS_CONTROL_REG_BASE macro
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D | eni.c | 1746 eni_dev->reg = base+REG_BASE; in eni_do_init()
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D | iphase.c | 2388 iadev->reg = base + REG_BASE;
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/Linux-v5.15/drivers/pinctrl/qcom/ |
D | pinctrl-msm8976.c | 22 #define REG_BASE 0x0 macro 42 .ctl_reg = REG_BASE + REG_SIZE * id, \ 43 .io_reg = REG_BASE + 0x4 + REG_SIZE * id, \ 44 .intr_cfg_reg = REG_BASE + 0x8 + REG_SIZE * id, \ 45 .intr_status_reg = REG_BASE + 0xc + REG_SIZE * id, \ 46 .intr_target_reg = REG_BASE + 0x8 + REG_SIZE * id, \
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D | pinctrl-msm8996.c | 20 #define REG_BASE 0x0 macro 40 .ctl_reg = REG_BASE + REG_SIZE * id, \ 41 .io_reg = REG_BASE + 0x4 + REG_SIZE * id, \ 42 .intr_cfg_reg = REG_BASE + 0x8 + REG_SIZE * id, \ 43 .intr_status_reg = REG_BASE + 0xc + REG_SIZE * id, \ 44 .intr_target_reg = REG_BASE + 0x8 + REG_SIZE * id, \
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