Searched refs:REG_A6XX_CP_SQE_INSTR_BASE (Results 1 – 2 of 2) sorted by relevance
852 gpu_write64(gpu, REG_A6XX_CP_SQE_INSTR_BASE, in a6xx_ucode_init()853 REG_A6XX_CP_SQE_INSTR_BASE+1, a6xx_gpu->sqe_iova); in a6xx_ucode_init()
1015 #define REG_A6XX_CP_SQE_INSTR_BASE 0x00000830 macro
