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Searched refs:PSW (Results 1 – 16 of 16) sorted by relevance

/Linux-v5.15/arch/sh/boards/mach-highlander/
Dirq-r7780rp.c20 PSW, /* Push Switch */ enumerator
35 INTC_IRQ(PSW, IRQ_PSW),
42 0, 0, 0, 0, 0, 0, PSW, AX88796 } },
Dirq-r7780mp.c25 PSW, /* Push Switch */ enumerator
39 INTC_IRQ(PSW, IRQ_PSW),
49 0, EXT6, EXT5, EXT4, EXT2, EXT1, PSW, AX88796 } },
/Linux-v5.15/Documentation/translations/zh_CN/parisc/
Dregisters.rst37 CR22 中断 PSW
102 PSW W 默认值 0
103 PSW E 默认值 0
Ddebugging.rst41 某些非常关键的代码必须清除PSW中的Q位。当Q位被清除时,CPU不会更新中断处理
/Linux-v5.15/arch/s390/kernel/
Dtext_amode31.S107 larl %r4,.Lcontinue_psw # Save PSW flags
110 larl %r4,.Lrestart_part2 # Setup restart PSW at absolute 0
112 og %r4,0(%r3) # Save PSW
129 larl %r4,.Lcontinue_psw # Restore PSW flags
Dentry.S258 # will rewind the PSW by the ILC, which is often 4 bytes in case of SIE. There
370 1: tmhh %r8,0x4000 # PER bit set in old PSW ?
/Linux-v5.15/arch/nds32/kernel/
Dex-entry.S57 mfsr $r19, $PSW
75 mtsr $r17, $PSW
121 mfsr $r21, $PSW
124 mtsr $r21, $PSW
Dex-exit.S43 mtsr $r19, $PSW
Dhead.S158 mfsr $p1, $PSW
/Linux-v5.15/Documentation/parisc/
Dregisters.rst27 CR22 Interrupt PSW
92 PSW default W value 0
93 PSW default E value 0
Ddebugging.rst38 Certain, very critical code has to clear the Q bit in the PSW. What
/Linux-v5.15/arch/s390/boot/
Dhead.S43 .long 0x02000068,0x60000050 # (a PSW and two CCWs).
53 .long 0x02000370,0x60000050 # the channel program the PSW
281 # this is called either by the ipl loader or directly by PSW restart
/Linux-v5.15/Documentation/virt/kvm/
Ds390-pv-boot.rst57 decrypt and verify the PV, as well as control flags and a start PSW.
Ds390-pv.rst60 PSW bit 13 has been changed, indicating that a machine check
Dapi.rst6921 This capability indicates that the PSW is exposed via the kvm_run structure.
/Linux-v5.15/arch/powerpc/xmon/
Dppc-opc.c350 #define PSW E macro
6339 {"psq_l", OP(56), OP_MASK, PPCPS, PPCVLE, {FRT,PSD,RA,PSW,PSQ}},
6345 {"psq_lu", OP(57), OP_MASK, PPCPS, PPCVLE, {FRT,PSD,RA,PSW,PSQ}},
6662 {"psq_st", OP(60), OP_MASK, PPCPS, PPCVLE, {FRS,PSD,RA,PSW,PSQ}},
6670 {"psq_stu", OP(61), OP_MASK, PPCPS, PPCVLE, {FRS,PSD,RA,PSW,PSQ}},