Searched refs:PSC (Results 1 – 14 of 14) sorted by relevance
/Linux-v5.15/Documentation/devicetree/bindings/powerpc/fsl/ |
D | mpc5121-psc.txt | 1 MPC5121 PSC Device Tree Bindings 3 PSC in UART mode 6 For PSC in UART mode the needed PSC serial devices 8 fsl,mpc5121-immr SoC node. Additionally the PSC FIFO 17 - reg : Offset and length of the register set for the PSC device 19 PSC FIFO Controller and b is a field that represents an 26 PSC in SPI mode 29 Similar to the UART mode a PSC can be operated in SPI mode. The compatible used 41 - reg : Offset and length of the register set for the PSC 44 PSC FIFO Controller and b is a field that represents an
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D | mpc5200.txt | 38 end of the compatible field. ie. A PSC in i2s mode would specify 42 the mpc5200 simple spi device and a PSC spi mode respectively. 90 serial@<addr> fsl,mpc5200-psc-uart PSC in serial mode 91 i2s@<addr> fsl,mpc5200-psc-i2s PSC in i2s mode 92 ac97@<addr> fsl,mpc5200-psc-ac97 PSC in ac97 mode 93 spi@<addr> fsl,mpc5200-psc-spi PSC in spi mode 94 irda@<addr> fsl,mpc5200-psc-irda PSC in IrDA mode 140 The PSCs should include a cell-index which is the index of the PSC in 142 use when setting up PSC clocking. cell-index number starts at '0'. ie: 146 PSC in i2s mode: The mpc5200 and mpc5200b PSCs are not compatible when in
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/Linux-v5.15/drivers/tty/serial/ |
D | mpc52xx_uart.c | 73 #define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase)) macro 133 return in_be16(&PSC(port)->mpc52xx_psc_status); in mpc52xx_psc_get_status() 138 return in_8(&PSC(port)->mpc52xx_psc_ipcr); in mpc52xx_psc_get_ipcr() 143 out_8(&PSC(port)->command, cmd); in mpc52xx_psc_command() 148 out_8(&PSC(port)->command, MPC52xx_PSC_SEL_MODE_REG_1); in mpc52xx_psc_set_mode() 149 out_8(&PSC(port)->mode, mr1); in mpc52xx_psc_set_mode() 150 out_8(&PSC(port)->mode, mr2); in mpc52xx_psc_set_mode() 156 out_8(&PSC(port)->op1, MPC52xx_PSC_OP_RTS); in mpc52xx_psc_set_rts() 158 out_8(&PSC(port)->op0, MPC52xx_PSC_OP_RTS); in mpc52xx_psc_set_rts() 163 struct mpc52xx_psc __iomem *psc = PSC(port); in mpc52xx_psc_enable_ms() [all …]
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D | Kconfig | 828 tristate "Freescale MPC52xx/MPC512x family PSC serial support" 832 This driver supports MPC52xx and MPC512x PSC serial ports. If you would 838 bool "Console on a Freescale MPC52xx/MPC512x family PSC serial port" 842 Select this options if you'd like to use one of the PSC serial port 846 int "Freescale MPC52xx/MPC512x family PSC serial port baud"
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/Linux-v5.15/Documentation/devicetree/bindings/clock/ti/davinci/ |
D | psc.txt | 1 Binding for TI DaVinci Power Sleep Controller (PSC) 3 The PSC provides power management, clock gating and reset functionality. It is
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/Linux-v5.15/drivers/mfd/ |
D | mt6358-irq.c | 23 MT6358_TOP_GEN(PSC), 34 MT6359_TOP_GEN(PSC),
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/Linux-v5.15/Documentation/devicetree/bindings/clock/ |
D | keystone-gate.txt | 3 Binding for Keystone gate control driver which uses PSC controller IP.
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/Linux-v5.15/sound/soc/au1x/ |
D | Kconfig | 3 ## Au1200/Au1550/Au1300 PSC + DBDMA
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/Linux-v5.15/arch/powerpc/platforms/512x/ |
D | clock-commonclk.c | 1038 NODE_CHK("ipg", clks[MPC512x_CLK_PSC0 + idx], 0, PSC); in mpc5121_clk_provide_backwards_compat() 1039 NODE_CHK("mclk", clks[MPC512x_CLK_PSC0_MCLK + idx], 0, PSC); in mpc5121_clk_provide_backwards_compat()
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/Linux-v5.15/arch/powerpc/boot/dts/ |
D | mpc5125twr.dts | 253 // 5125 PSCs are not 52xx or 5121 PSC compatible
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D | mpc5121.dtsi | 346 /* 512x PSCs are not 52xx PSC compatible */
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/Linux-v5.15/sound/soc/fsl/ |
D | Kconfig | 216 tristate "Freescale MPC5200 PSC in I2S mode driver" 224 tristate "Freescale MPC5200 PSC in AC97 mode driver"
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/Linux-v5.15/drivers/spi/ |
D | Kconfig | 135 PSC SPI controller found on Au1550, Au1200 and Au1300 series. 436 tristate "Freescale MPC52xx SPI (non-PSC) controller support" 443 tristate "Freescale MPC52xx PSC SPI controller" 450 tristate "Freescale MPC512x PSC SPI controller"
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/Linux-v5.15/Documentation/admin-guide/ |
D | devices.txt | 2712 148 = /dev/ttyPSC0 PPC PSC - port 0 2714 153 = /dev/ttyPSC5 PPC PSC - port 5
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