Searched refs:PPCLK_VCLK_1 (Results 1 – 3 of 3) sorted by relevance
160 CLK_MAP(VCLK1, PPCLK_VCLK_1),553 *value = use_metrics_v2 ? metrics_v2->CurrClock[PPCLK_VCLK_1] : in sienna_cichlid_get_smu_metrics_data()554 metrics->CurrClock[PPCLK_VCLK_1]; in sienna_cichlid_get_smu_metrics_data()777 !table_member[PPCLK_VCLK_1].SnapToDiscrete; in sienna_cichlid_set_default_dpm_table()987 case PPCLK_VCLK_1: in sienna_cichlid_get_current_clk_freq_by_table()2458 pptable->DpmDescriptor[PPCLK_VCLK_1].VoltageMode, in beige_goby_dump_pptable()2459 pptable->DpmDescriptor[PPCLK_VCLK_1].SnapToDiscrete, in beige_goby_dump_pptable()2460 pptable->DpmDescriptor[PPCLK_VCLK_1].NumDiscreteLevels, in beige_goby_dump_pptable()2461 pptable->DpmDescriptor[PPCLK_VCLK_1].Padding, in beige_goby_dump_pptable()2462 pptable->DpmDescriptor[PPCLK_VCLK_1].ConversionToAvfsClk.m, in beige_goby_dump_pptable()[all …]
41 PPCLK_VCLK_1, enumerator
464 PPCLK_VCLK_1, enumerator
