Searched refs:PPCLK_DCLK_1 (Results 1 – 3 of 3) sorted by relevance
158 CLK_MAP(DCLK1, PPCLK_DCLK_1),561 *value = use_metrics_v2 ? metrics_v2->CurrClock[PPCLK_DCLK_1] : in sienna_cichlid_get_smu_metrics_data()562 metrics->CurrClock[PPCLK_DCLK_1]; in sienna_cichlid_get_smu_metrics_data()816 !table_member[PPCLK_DCLK_1].SnapToDiscrete; in sienna_cichlid_set_default_dpm_table()993 case PPCLK_DCLK_1: in sienna_cichlid_get_current_clk_freq_by_table()2437 pptable->DpmDescriptor[PPCLK_DCLK_1].VoltageMode, in beige_goby_dump_pptable()2438 pptable->DpmDescriptor[PPCLK_DCLK_1].SnapToDiscrete, in beige_goby_dump_pptable()2439 pptable->DpmDescriptor[PPCLK_DCLK_1].NumDiscreteLevels, in beige_goby_dump_pptable()2440 pptable->DpmDescriptor[PPCLK_DCLK_1].Padding, in beige_goby_dump_pptable()2441 pptable->DpmDescriptor[PPCLK_DCLK_1].ConversionToAvfsClk.m, in beige_goby_dump_pptable()[all …]
40 PPCLK_DCLK_1, enumerator
463 PPCLK_DCLK_1, enumerator
