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Searched refs:PINMUX_CFG_REG (Results 1 – 25 of 33) sorted by relevance

12

/Linux-v5.15/drivers/pinctrl/renesas/
Dpfc-sh7264.c1468 { PINMUX_CFG_REG("PAIOR0", 0xfffe3812, 16, 1, GROUP(
1478 { PINMUX_CFG_REG("PBCR5", 0xfffe3824, 16, 4, GROUP(
1489 { PINMUX_CFG_REG("PBCR4", 0xfffe3826, 16, 4, GROUP(
1499 { PINMUX_CFG_REG("PBCR3", 0xfffe3828, 16, 4, GROUP(
1509 { PINMUX_CFG_REG("PBCR2", 0xfffe382a, 16, 4, GROUP(
1519 { PINMUX_CFG_REG("PBCR1", 0xfffe382c, 16, 4, GROUP(
1529 { PINMUX_CFG_REG("PBCR0", 0xfffe382e, 16, 4, GROUP(
1540 { PINMUX_CFG_REG("PBIOR1", 0xfffe3830, 16, 1, GROUP(
1553 { PINMUX_CFG_REG("PBIOR0", 0xfffe3832, 16, 1, GROUP(
1572 { PINMUX_CFG_REG("PCCR2", 0xfffe384a, 16, 4, GROUP(
[all …]
Dpfc-sh7269.c1970 { PINMUX_CFG_REG("PAIOR0", 0xfffe3812, 16, 1, GROUP(
1976 { PINMUX_CFG_REG("PBCR5", 0xfffe3824, 16, 4, GROUP(
1990 { PINMUX_CFG_REG("PBCR4", 0xfffe3826, 16, 4, GROUP(
2007 { PINMUX_CFG_REG("PBCR3", 0xfffe3828, 16, 4, GROUP(
2023 { PINMUX_CFG_REG("PBCR2", 0xfffe382a, 16, 4, GROUP(
2036 { PINMUX_CFG_REG("PBCR1", 0xfffe382c, 16, 4, GROUP(
2049 { PINMUX_CFG_REG("PBCR0", 0xfffe382e, 16, 4, GROUP(
2062 { PINMUX_CFG_REG("PBIOR1", 0xfffe3830, 16, 1, GROUP(
2074 { PINMUX_CFG_REG("PBIOR0", 0xfffe3832, 16, 1, GROUP(
2093 { PINMUX_CFG_REG("PCCR2", 0xfffe384a, 16, 4, GROUP(
[all …]
Dpfc-sh7203.c1076 { PINMUX_CFG_REG("PBIORL", 0xfffe3886, 16, 1, GROUP(
1094 { PINMUX_CFG_REG("PBCRL4", 0xfffe3890, 16, 4, GROUP(
1104 { PINMUX_CFG_REG("PBCRL3", 0xfffe3892, 16, 4, GROUP(
1117 { PINMUX_CFG_REG("PBCRL2", 0xfffe3894, 16, 4, GROUP(
1130 { PINMUX_CFG_REG("PBCRL1", 0xfffe3896, 16, 4, GROUP(
1143 { PINMUX_CFG_REG("IFCR", 0xfffe38a2, 16, 4, GROUP(
1153 { PINMUX_CFG_REG("PCIORL", 0xfffe3906, 16, 1, GROUP(
1171 { PINMUX_CFG_REG("PCCRL4", 0xfffe3910, 16, 4, GROUP(
1183 { PINMUX_CFG_REG("PCCRL3", 0xfffe3912, 16, 4, GROUP(
1196 { PINMUX_CFG_REG("PCCRL2", 0xfffe3914, 16, 4, GROUP(
[all …]
Dpfc-sh7722.c1240 { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2, GROUP(
1250 { PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2, GROUP(
1260 { PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2, GROUP(
1270 { PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2, GROUP(
1280 { PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2, GROUP(
1290 { PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2, GROUP(
1300 { PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2, GROUP(
1310 { PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2, GROUP(
1320 { PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2, GROUP(
1330 { PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2, GROUP(
[all …]
Dpfc-sh7757.c1686 { PINMUX_CFG_REG("PACR", 0xffec0000, 16, 2, GROUP(
1696 { PINMUX_CFG_REG("PBCR", 0xffec0002, 16, 2, GROUP(
1706 { PINMUX_CFG_REG("PCCR", 0xffec0004, 16, 2, GROUP(
1716 { PINMUX_CFG_REG("PDCR", 0xffec0006, 16, 2, GROUP(
1726 { PINMUX_CFG_REG("PECR", 0xffec0008, 16, 2, GROUP(
1736 { PINMUX_CFG_REG("PFCR", 0xffec000a, 16, 2, GROUP(
1746 { PINMUX_CFG_REG("PGCR", 0xffec000c, 16, 2, GROUP(
1756 { PINMUX_CFG_REG("PHCR", 0xffec000e, 16, 2, GROUP(
1766 { PINMUX_CFG_REG("PICR", 0xffec0010, 16, 2, GROUP(
1776 { PINMUX_CFG_REG("PJCR", 0xffec0012, 16, 2, GROUP(
[all …]
Dpfc-sh7720.c928 { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2, GROUP(
938 { PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2, GROUP(
948 { PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2, GROUP(
958 { PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2, GROUP(
968 { PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2, GROUP(
978 { PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2, GROUP(
988 { PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2, GROUP(
998 { PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2, GROUP(
1008 { PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2, GROUP(
1018 { PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2, GROUP(
[all …]
Dpfc-sh7785.c988 { PINMUX_CFG_REG("PACR", 0xffe70000, 16, 2, GROUP(
998 { PINMUX_CFG_REG("PBCR", 0xffe70002, 16, 2, GROUP(
1008 { PINMUX_CFG_REG("PCCR", 0xffe70004, 16, 2, GROUP(
1018 { PINMUX_CFG_REG("PDCR", 0xffe70006, 16, 2, GROUP(
1028 { PINMUX_CFG_REG("PECR", 0xffe70008, 16, 2, GROUP(
1038 { PINMUX_CFG_REG("PFCR", 0xffe7000a, 16, 2, GROUP(
1048 { PINMUX_CFG_REG("PGCR", 0xffe7000c, 16, 2, GROUP(
1058 { PINMUX_CFG_REG("PHCR", 0xffe7000e, 16, 2, GROUP(
1068 { PINMUX_CFG_REG("PJCR", 0xffe70010, 16, 2, GROUP(
1078 { PINMUX_CFG_REG("PKCR", 0xffe70012, 16, 2, GROUP(
[all …]
Dpfc-sh7723.c1510 { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2, GROUP(
1520 { PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2, GROUP(
1530 { PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2, GROUP(
1540 { PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2, GROUP(
1550 { PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2, GROUP(
1560 { PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2, GROUP(
1570 { PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2, GROUP(
1580 { PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2, GROUP(
1590 { PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2, GROUP(
1600 { PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2, GROUP(
[all …]
Dpfc-sh7724.c1742 { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2, GROUP(
1752 { PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2, GROUP(
1762 { PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2, GROUP(
1772 { PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2, GROUP(
1782 { PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2, GROUP(
1792 { PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2, GROUP(
1802 { PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2, GROUP(
1812 { PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2, GROUP(
1822 { PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2, GROUP(
1832 { PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2, GROUP(
[all …]
Dpfc-sh7786.c630 { PINMUX_CFG_REG("PACR", 0xffcc0000, 16, 2, GROUP(
640 { PINMUX_CFG_REG("PBCR", 0xffcc0002, 16, 2, GROUP(
650 { PINMUX_CFG_REG("PCCR", 0xffcc0004, 16, 2, GROUP(
660 { PINMUX_CFG_REG("PDCR", 0xffcc0006, 16, 2, GROUP(
670 { PINMUX_CFG_REG("PECR", 0xffcc0008, 16, 2, GROUP(
680 { PINMUX_CFG_REG("PFCR", 0xffcc000a, 16, 2, GROUP(
690 { PINMUX_CFG_REG("PGCR", 0xffcc000c, 16, 2, GROUP(
700 { PINMUX_CFG_REG("PHCR", 0xffcc000e, 16, 2, GROUP(
710 { PINMUX_CFG_REG("PJCR", 0xffcc0010, 16, 2, GROUP(
720 { PINMUX_CFG_REG("P1MSELR", 0xffcc0080, 16, 1, GROUP(
[all …]
Dpfc-r8a77995.c2397 { PINMUX_CFG_REG("GPSR0", 0xe6060100, 32, 1, GROUP(
2431 { PINMUX_CFG_REG("GPSR1", 0xe6060104, 32, 1, GROUP(
2465 { PINMUX_CFG_REG("GPSR2", 0xe6060108, 32, 1, GROUP(
2499 { PINMUX_CFG_REG("GPSR3", 0xe606010c, 32, 1, GROUP(
2533 { PINMUX_CFG_REG("GPSR4", 0xe6060110, 32, 1, GROUP(
2567 { PINMUX_CFG_REG("GPSR5", 0xe6060114, 32, 1, GROUP(
2601 { PINMUX_CFG_REG("GPSR6", 0xe6060118, 32, 1, GROUP(
2640 { PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4, GROUP(
2650 { PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4, GROUP(
2660 { PINMUX_CFG_REG("IPSR2", 0xe6060208, 32, 4, GROUP(
[all …]
Dpfc-r8a77970.c2150 { PINMUX_CFG_REG("GPSR0", 0xe6060100, 32, 1, GROUP(
2184 { PINMUX_CFG_REG("GPSR1", 0xe6060104, 32, 1, GROUP(
2218 { PINMUX_CFG_REG("GPSR2", 0xe6060108, 32, 1, GROUP(
2252 { PINMUX_CFG_REG("GPSR3", 0xe606010c, 32, 1, GROUP(
2286 { PINMUX_CFG_REG("GPSR4", 0xe6060110, 32, 1, GROUP(
2320 { PINMUX_CFG_REG("GPSR5", 0xe6060114, 32, 1, GROUP(
2359 { PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4, GROUP(
2369 { PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4, GROUP(
2379 { PINMUX_CFG_REG("IPSR2", 0xe6060208, 32, 4, GROUP(
2389 { PINMUX_CFG_REG("IPSR3", 0xe606020c, 32, 4, GROUP(
[all …]
Dpfc-r8a779a0.c3188 { PINMUX_CFG_REG("GPSR0", 0xe6058040, 32, 1, GROUP(
3222 { PINMUX_CFG_REG("GPSR1", 0xe6050040, 32, 1, GROUP(
3256 { PINMUX_CFG_REG("GPSR2", 0xe6050840, 32, 1, GROUP(
3290 { PINMUX_CFG_REG("GPSR3", 0xe6058840, 32, 1, GROUP(
3324 { PINMUX_CFG_REG("GPSR4", 0xe6060040, 32, 1, GROUP(
3358 { PINMUX_CFG_REG("GPSR5", 0xe6060840, 32, 1, GROUP(
3392 { PINMUX_CFG_REG("GPSR6", 0xe6068040, 32, 1, GROUP(
3426 { PINMUX_CFG_REG("GPSR7", 0xe6068840, 32, 1, GROUP(
3460 { PINMUX_CFG_REG("GPSR8", 0xe6069040, 32, 1, GROUP(
3494 { PINMUX_CFG_REG("GPSR9", 0xe6069840, 32, 1, GROUP(
[all …]
Dpfc-r8a77980.c2572 { PINMUX_CFG_REG("GPSR0", 0xe6060100, 32, 1, GROUP(
2606 { PINMUX_CFG_REG("GPSR1", 0xe6060104, 32, 1, GROUP(
2640 { PINMUX_CFG_REG("GPSR2", 0xe6060108, 32, 1, GROUP(
2674 { PINMUX_CFG_REG("GPSR3", 0xe606010c, 32, 1, GROUP(
2708 { PINMUX_CFG_REG("GPSR4", 0xe6060110, 32, 1, GROUP(
2742 { PINMUX_CFG_REG("GPSR5", 0xe6060114, 32, 1, GROUP(
2781 { PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4, GROUP(
2791 { PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4, GROUP(
2801 { PINMUX_CFG_REG("IPSR2", 0xe6060208, 32, 4, GROUP(
2811 { PINMUX_CFG_REG("IPSR3", 0xe606020c, 32, 4, GROUP(
[all …]
Dpfc-r8a7792.c2010 { PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1, GROUP(
2044 { PINMUX_CFG_REG("GPSR1", 0xE6060008, 32, 1, GROUP(
2078 { PINMUX_CFG_REG("GPSR2", 0xE606000C, 32, 1, GROUP(
2112 { PINMUX_CFG_REG("GPSR3", 0xE6060010, 32, 1, GROUP(
2146 { PINMUX_CFG_REG("GPSR4", 0xE6060014, 32, 1, GROUP(
2180 { PINMUX_CFG_REG("GPSR5", 0xE6060018, 32, 1, GROUP(
2214 { PINMUX_CFG_REG("GPSR6", 0xE606001C, 32, 1, GROUP(
2248 { PINMUX_CFG_REG("GPSR7", 0xE6060020, 32, 1, GROUP(
2282 { PINMUX_CFG_REG("GPSR8", 0xE6060024, 32, 1, GROUP(
2316 { PINMUX_CFG_REG("GPSR9", 0xE6060028, 32, 1, GROUP(
[all …]
Dpfc-shx3.c434 { PINMUX_CFG_REG("PABCR", 0xffc70000, 32, 2, GROUP(
452 { PINMUX_CFG_REG("PCDCR", 0xffc70004, 32, 2, GROUP(
470 { PINMUX_CFG_REG("PEFCR", 0xffc70008, 32, 2, GROUP(
488 { PINMUX_CFG_REG("PGHCR", 0xffc7000c, 32, 2, GROUP(
Dpfc-r8a77950.c4750 { PINMUX_CFG_REG("GPSR0", 0xe6060100, 32, 1, GROUP(
4784 { PINMUX_CFG_REG("GPSR1", 0xe6060104, 32, 1, GROUP(
4818 { PINMUX_CFG_REG("GPSR2", 0xe6060108, 32, 1, GROUP(
4852 { PINMUX_CFG_REG("GPSR3", 0xe606010c, 32, 1, GROUP(
4886 { PINMUX_CFG_REG("GPSR4", 0xe6060110, 32, 1, GROUP(
4920 { PINMUX_CFG_REG("GPSR5", 0xe6060114, 32, 1, GROUP(
4954 { PINMUX_CFG_REG("GPSR6", 0xe6060118, 32, 1, GROUP(
4988 { PINMUX_CFG_REG("GPSR7", 0xe606011c, 32, 1, GROUP(
5027 { PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4, GROUP(
5037 { PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4, GROUP(
[all …]
Dpfc-r8a77990.c4639 { PINMUX_CFG_REG("GPSR0", 0xe6060100, 32, 1, GROUP(
4673 { PINMUX_CFG_REG("GPSR1", 0xe6060104, 32, 1, GROUP(
4707 { PINMUX_CFG_REG("GPSR2", 0xe6060108, 32, 1, GROUP(
4741 { PINMUX_CFG_REG("GPSR3", 0xe606010c, 32, 1, GROUP(
4775 { PINMUX_CFG_REG("GPSR4", 0xe6060110, 32, 1, GROUP(
4809 { PINMUX_CFG_REG("GPSR5", 0xe6060114, 32, 1, GROUP(
4843 { PINMUX_CFG_REG("GPSR6", 0xe6060118, 32, 1, GROUP(
4882 { PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4, GROUP(
4892 { PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4, GROUP(
4902 { PINMUX_CFG_REG("IPSR2", 0xe6060208, 32, 4, GROUP(
[all …]
Dpfc-r8a77951.c5220 { PINMUX_CFG_REG("GPSR0", 0xe6060100, 32, 1, GROUP(
5254 { PINMUX_CFG_REG("GPSR1", 0xe6060104, 32, 1, GROUP(
5288 { PINMUX_CFG_REG("GPSR2", 0xe6060108, 32, 1, GROUP(
5322 { PINMUX_CFG_REG("GPSR3", 0xe606010c, 32, 1, GROUP(
5356 { PINMUX_CFG_REG("GPSR4", 0xe6060110, 32, 1, GROUP(
5390 { PINMUX_CFG_REG("GPSR5", 0xe6060114, 32, 1, GROUP(
5424 { PINMUX_CFG_REG("GPSR6", 0xe6060118, 32, 1, GROUP(
5458 { PINMUX_CFG_REG("GPSR7", 0xe606011c, 32, 1, GROUP(
5497 { PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4, GROUP(
5507 { PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4, GROUP(
[all …]
Dpfc-r8a7796.c5175 { PINMUX_CFG_REG("GPSR0", 0xe6060100, 32, 1, GROUP(
5209 { PINMUX_CFG_REG("GPSR1", 0xe6060104, 32, 1, GROUP(
5243 { PINMUX_CFG_REG("GPSR2", 0xe6060108, 32, 1, GROUP(
5277 { PINMUX_CFG_REG("GPSR3", 0xe606010c, 32, 1, GROUP(
5311 { PINMUX_CFG_REG("GPSR4", 0xe6060110, 32, 1, GROUP(
5345 { PINMUX_CFG_REG("GPSR5", 0xe6060114, 32, 1, GROUP(
5379 { PINMUX_CFG_REG("GPSR6", 0xe6060118, 32, 1, GROUP(
5413 { PINMUX_CFG_REG("GPSR7", 0xe606011c, 32, 1, GROUP(
5452 { PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4, GROUP(
5462 { PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4, GROUP(
[all …]
Dpfc-r8a77965.c5432 { PINMUX_CFG_REG("GPSR0", 0xe6060100, 32, 1, GROUP(
5466 { PINMUX_CFG_REG("GPSR1", 0xe6060104, 32, 1, GROUP(
5500 { PINMUX_CFG_REG("GPSR2", 0xe6060108, 32, 1, GROUP(
5534 { PINMUX_CFG_REG("GPSR3", 0xe606010c, 32, 1, GROUP(
5568 { PINMUX_CFG_REG("GPSR4", 0xe6060110, 32, 1, GROUP(
5602 { PINMUX_CFG_REG("GPSR5", 0xe6060114, 32, 1, GROUP(
5636 { PINMUX_CFG_REG("GPSR6", 0xe6060118, 32, 1, GROUP(
5670 { PINMUX_CFG_REG("GPSR7", 0xe606011c, 32, 1, GROUP(
5709 { PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4, GROUP(
5719 { PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4, GROUP(
[all …]
Dpfc-sh7734.c1638 { PINMUX_CFG_REG("GPSR0", 0xFFFC0004, 32, 1, GROUP(
1672 { PINMUX_CFG_REG("GPSR1", 0xFFFC0008, 32, 1, GROUP(
1706 { PINMUX_CFG_REG("GPSR2", 0xFFFC000C, 32, 1, GROUP(
1740 { PINMUX_CFG_REG("GPSR3", 0xFFFC0010, 32, 1, GROUP(
1775 { PINMUX_CFG_REG("GPSR4", 0xFFFC0014, 32, 1, GROUP(
1809 { PINMUX_CFG_REG("GPSR5", 0xFFFC0018, 32, 1, GROUP(
2396 { PINMUX_CFG_REG("INOUTSEL0", 0xFFC40004, 32, 1, GROUP(GP_INOUTSEL(0)))
2398 { PINMUX_CFG_REG("INOUTSEL1", 0xFFC41004, 32, 1, GROUP(GP_INOUTSEL(1)))
2400 { PINMUX_CFG_REG("INOUTSEL2", 0xFFC42004, 32, 1, GROUP(GP_INOUTSEL(2)))
2402 { PINMUX_CFG_REG("INOUTSEL3", 0xFFC43004, 32, 1, GROUP(GP_INOUTSEL(3)))
[all …]
Dpfc-emev2.c1434 { PINMUX_CFG_REG("GPSR0", 0xe0140200, 32, 1, GROUP(
1469 { PINMUX_CFG_REG("GPSR1", 0xe0140204, 32, 1, GROUP(
1504 { PINMUX_CFG_REG("GPSR2", 0xe0140208, 32, 1, GROUP(
1539 { PINMUX_CFG_REG("GPSR3", 0xe014020c, 32, 1, GROUP(
1574 { PINMUX_CFG_REG("GPSR4", 0xe0140210, 32, 1, GROUP(
Dpfc-r8a73a4.c2287 { PINMUX_CFG_REG("MSEL1CR", 0xe605800c, 32, 1, GROUP(
2322 { PINMUX_CFG_REG("MSEL3CR", 0xe6058020, 32, 1, GROUP(
2357 { PINMUX_CFG_REG("MSEL4CR", 0xe6058024, 32, 1, GROUP(
2392 { PINMUX_CFG_REG("MSEL5CR", 0xe6058028, 32, 1, GROUP(
2427 { PINMUX_CFG_REG("MSEL8CR", 0xe6058034, 32, 1, GROUP(
Dpfc-r8a7779.c3157 { PINMUX_CFG_REG("GPSR0", 0xfffc0004, 32, 1, GROUP(
3191 { PINMUX_CFG_REG("GPSR1", 0xfffc0008, 32, 1, GROUP(
3225 { PINMUX_CFG_REG("GPSR2", 0xfffc000c, 32, 1, GROUP(
3259 { PINMUX_CFG_REG("GPSR3", 0xfffc0010, 32, 1, GROUP(
3293 { PINMUX_CFG_REG("GPSR4", 0xfffc0014, 32, 1, GROUP(
3327 { PINMUX_CFG_REG("GPSR5", 0xfffc0018, 32, 1, GROUP(
3361 { PINMUX_CFG_REG("GPSR6", 0xfffc001c, 32, 1, GROUP(

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