Searched refs:PHYBSYMCLK_CLOCK_CNTL (Results 1 – 4 of 4) sorted by relevance
| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn30/ |
| D | dcn30_dccg.h | 35 SR(PHYBSYMCLK_CLOCK_CNTL),\
46 SR(PHYBSYMCLK_CLOCK_CNTL),\
55 DCCG_SF(PHYBSYMCLK_CLOCK_CNTL, PHYBSYMCLK_FORCE_EN, mask_sh),\
56 DCCG_SF(PHYBSYMCLK_CLOCK_CNTL, PHYBSYMCLK_FORCE_SRC_SEL, mask_sh),\
64 DCCG_SF(PHYBSYMCLK_CLOCK_CNTL, PHYBSYMCLK_FORCE_EN, mask_sh),\
65 DCCG_SF(PHYBSYMCLK_CLOCK_CNTL, PHYBSYMCLK_FORCE_SRC_SEL, mask_sh),\
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| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn31/ |
| D | dcn31_dccg.h | 42 SR(PHYBSYMCLK_CLOCK_CNTL),\
80 DCCG_SF(PHYBSYMCLK_CLOCK_CNTL, PHYBSYMCLK_FORCE_EN, mask_sh),\
81 DCCG_SF(PHYBSYMCLK_CLOCK_CNTL, PHYBSYMCLK_FORCE_SRC_SEL, mask_sh),\
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| D | dcn31_dccg.c | 67 REG_UPDATE_2(PHYBSYMCLK_CLOCK_CNTL, in dccg31_set_physymclk()
71 REG_UPDATE_2(PHYBSYMCLK_CLOCK_CNTL, in dccg31_set_physymclk()
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| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_dccg.h | 194 uint32_t PHYBSYMCLK_CLOCK_CNTL; member
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