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Searched refs:MT_DMA_SHDL (Results 1 – 4 of 4) sorted by relevance

/Linux-v5.15/drivers/net/wireless/mediatek/mt76/mt7615/
Ddma.c172 mt76_rmw(dev, MT_DMA_SHDL(MT_DMASHDL_PKT_MAX_SIZE), in mt7663_dma_sched_init()
178 mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_REFILL), 0xffc80000); in mt7663_dma_sched_init()
180 mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_OPTIONAL), 0x70068037); in mt7663_dma_sched_init()
184 mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_GROUP_QUOTA(i)), in mt7663_dma_sched_init()
187 mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_GROUP_QUOTA(5)), in mt7663_dma_sched_init()
190 mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_GROUP_QUOTA(15)), in mt7663_dma_sched_init()
194 mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_Q_MAP(0)), 0x42104210); in mt7663_dma_sched_init()
195 mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_Q_MAP(1)), 0x42104210); in mt7663_dma_sched_init()
196 mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_Q_MAP(2)), 0x00050005); in mt7663_dma_sched_init()
197 mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_Q_MAP(3)), 0); in mt7663_dma_sched_init()
[all …]
Dusb_sdio.c228 mt76_rmw(dev, MT_DMA_SHDL(MT_DMASHDL_PKT_MAX_SIZE), in mt7663u_dma_sched_init()
236 mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_REFILL), 0xffe00006); in mt7663u_dma_sched_init()
237 mt76_clear(dev, MT_DMA_SHDL(MT_DMASHDL_PAGE), BIT(16)); in mt7663u_dma_sched_init()
240 mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_GROUP_QUOTA(i)), in mt7663u_dma_sched_init()
244 mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_Q_MAP(0)), 0x42104210); in mt7663u_dma_sched_init()
245 mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_Q_MAP(1)), 0x42104210); in mt7663u_dma_sched_init()
247 mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_Q_MAP(2)), 0x4444); in mt7663u_dma_sched_init()
252 mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_SCHED_SET0), 0x6501234f); in mt7663u_dma_sched_init()
253 mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_SCHED_SET1), 0xedcba987); in mt7663u_dma_sched_init()
254 mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_OPTIONAL), 0x7004801c); in mt7663u_dma_sched_init()
Dregs.h513 #define MT_DMA_SHDL(ofs) (dev->reg_map[MT_DMA_SHDL_BASE] + (ofs)) macro
/Linux-v5.15/drivers/net/wireless/mediatek/mt76/mt7921/
Dregs.h405 #define MT_DMA_SHDL(ofs) (0xd6000 + (ofs)) macro
406 #define MT_DMASHDL_SW_CONTROL MT_DMA_SHDL(0x004)
408 #define MT_DMASHDL_OPTIONAL MT_DMA_SHDL(0x008)
409 #define MT_DMASHDL_PAGE MT_DMA_SHDL(0x00c)
410 #define MT_DMASHDL_REFILL MT_DMA_SHDL(0x010)
411 #define MT_DMASHDL_PKT_MAX_SIZE MT_DMA_SHDL(0x01c)
415 #define MT_DMASHDL_GROUP_QUOTA(_n) MT_DMA_SHDL(0x020 + ((_n) << 2))
419 #define MT_DMASHDL_Q_MAP(_n) MT_DMA_SHDL(0x060 + ((_n) << 2))
423 #define MT_DMASHDL_SCHED_SET(_n) MT_DMA_SHDL(0x070 + ((_n) << 2))