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Searched refs:MPCC1_MPCC_CONTROL__MPCC_GLOBAL_GAIN_MASK (Results 1 – 8 of 8) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_sh_mask.h24211 #define MPCC1_MPCC_CONTROL__MPCC_GLOBAL_GAIN_MASK … macro
Ddcn_2_1_0_sh_mask.h20292 #define MPCC1_MPCC_CONTROL__MPCC_GLOBAL_GAIN_MASK … macro
Ddcn_3_0_1_sh_mask.h40162 #define MPCC1_MPCC_CONTROL__MPCC_GLOBAL_GAIN_MASK … macro
Ddcn_1_0_sh_mask.h18921 #define MPCC1_MPCC_CONTROL__MPCC_GLOBAL_GAIN_MASK … macro
Ddcn_3_1_2_sh_mask.h22618 #define MPCC1_MPCC_CONTROL__MPCC_GLOBAL_GAIN_MASK … macro
Ddcn_3_0_2_sh_mask.h47164 #define MPCC1_MPCC_CONTROL__MPCC_GLOBAL_GAIN_MASK … macro
Ddcn_2_0_0_sh_mask.h23360 #define MPCC1_MPCC_CONTROL__MPCC_GLOBAL_GAIN_MASK … macro
Ddcn_3_0_0_sh_mask.h54314 #define MPCC1_MPCC_CONTROL__MPCC_GLOBAL_GAIN_MASK … macro