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Searched refs:MPCC0_MPCC_TOP_GAIN__MPCC_TOP_GAIN__SHIFT (Results 1 – 7 of 7) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_sh_mask.h24150 #define MPCC0_MPCC_TOP_GAIN__MPCC_TOP_GAIN__SHIFT … macro
Ddcn_2_1_0_sh_mask.h20218 #define MPCC0_MPCC_TOP_GAIN__MPCC_TOP_GAIN__SHIFT … macro
Ddcn_3_0_1_sh_mask.h40101 #define MPCC0_MPCC_TOP_GAIN__MPCC_TOP_GAIN__SHIFT … macro
Ddcn_3_1_2_sh_mask.h22557 #define MPCC0_MPCC_TOP_GAIN__MPCC_TOP_GAIN__SHIFT … macro
Ddcn_3_0_2_sh_mask.h47103 #define MPCC0_MPCC_TOP_GAIN__MPCC_TOP_GAIN__SHIFT … macro
Ddcn_2_0_0_sh_mask.h23286 #define MPCC0_MPCC_TOP_GAIN__MPCC_TOP_GAIN__SHIFT … macro
Ddcn_3_0_0_sh_mask.h54253 #define MPCC0_MPCC_TOP_GAIN__MPCC_TOP_GAIN__SHIFT … macro