Home
last modified time | relevance | path

Searched refs:MPCC0_MPCC_CONTROL__MPCC_GLOBAL_GAIN_MASK (Results 1 – 8 of 8) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_sh_mask.h24128 #define MPCC0_MPCC_CONTROL__MPCC_GLOBAL_GAIN_MASK … macro
Ddcn_2_1_0_sh_mask.h20196 #define MPCC0_MPCC_CONTROL__MPCC_GLOBAL_GAIN_MASK … macro
Ddcn_3_0_1_sh_mask.h40079 #define MPCC0_MPCC_CONTROL__MPCC_GLOBAL_GAIN_MASK … macro
Ddcn_1_0_sh_mask.h18818 #define MPCC0_MPCC_CONTROL__MPCC_GLOBAL_GAIN_MASK … macro
Ddcn_3_1_2_sh_mask.h22535 #define MPCC0_MPCC_CONTROL__MPCC_GLOBAL_GAIN_MASK … macro
Ddcn_3_0_2_sh_mask.h47081 #define MPCC0_MPCC_CONTROL__MPCC_GLOBAL_GAIN_MASK … macro
Ddcn_2_0_0_sh_mask.h23264 #define MPCC0_MPCC_CONTROL__MPCC_GLOBAL_GAIN_MASK … macro
Ddcn_3_0_0_sh_mask.h54231 #define MPCC0_MPCC_CONTROL__MPCC_GLOBAL_GAIN_MASK … macro