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Searched refs:MPCC0_MPCC_CONTROL__MPCC_BG_BPC_MASK (Results 1 – 7 of 7) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_sh_mask.h24125 #define MPCC0_MPCC_CONTROL__MPCC_BG_BPC_MASK … macro
Ddcn_2_1_0_sh_mask.h20193 #define MPCC0_MPCC_CONTROL__MPCC_BG_BPC_MASK … macro
Ddcn_3_0_1_sh_mask.h40076 #define MPCC0_MPCC_CONTROL__MPCC_BG_BPC_MASK … macro
Ddcn_3_1_2_sh_mask.h22532 #define MPCC0_MPCC_CONTROL__MPCC_BG_BPC_MASK … macro
Ddcn_3_0_2_sh_mask.h47078 #define MPCC0_MPCC_CONTROL__MPCC_BG_BPC_MASK … macro
Ddcn_2_0_0_sh_mask.h23261 #define MPCC0_MPCC_CONTROL__MPCC_BG_BPC_MASK … macro
Ddcn_3_0_0_sh_mask.h54228 #define MPCC0_MPCC_CONTROL__MPCC_BG_BPC_MASK … macro