Home
last modified time | relevance | path

Searched refs:MMC_TIMING_MMC_DDR52 (Results 1 – 25 of 37) sorted by relevance

12

/Linux-v5.15/drivers/mmc/host/
Ddw_mmc-hi3798cv200.c38 if (ios->timing == MMC_TIMING_MMC_DDR52 || in dw_mci_hi3798cv200_set_ios()
46 if (ios->timing == MMC_TIMING_MMC_DDR52) in dw_mci_hi3798cv200_set_ios()
Ddw_mmc-rockchip.c47 ios->timing == MMC_TIMING_MMC_DDR52) in dw_mci_rk3288_set_ios()
105 case MMC_TIMING_MMC_DDR52: in dw_mci_rk3288_set_ios()
Dsdhci-of-arasan.c643 case MMC_TIMING_MMC_DDR52: in sdhci_zynqmp_sdcardclk_set_phase()
712 case MMC_TIMING_MMC_DDR52: in sdhci_zynqmp_sampleclk_set_phase()
772 case MMC_TIMING_MMC_DDR52: in sdhci_versal_sdcardclk_set_phase()
839 case MMC_TIMING_MMC_DDR52: in sdhci_versal_sampleclk_set_phase()
1109 arasan_dt_read_clk_phase(dev, clk_data, MMC_TIMING_MMC_DDR52, in arasan_dt_parse_clk_phases()
Dsdhci-xenon.c215 (timing == MMC_TIMING_MMC_DDR52)) in xenon_set_uhs_signaling()
370 host->timing == MMC_TIMING_MMC_DDR52) in xenon_execute_tuning()
Dsdhci-sprd.c96 { "sprd,phy-delay-mmc-ddr52", MMC_TIMING_MMC_DDR52, },
332 case MMC_TIMING_MMC_DDR52: in sdhci_sprd_set_uhs_signaling()
Dsdhci-xenon-phy.c621 case MMC_TIMING_MMC_DDR52: in xenon_emmc_phy_set()
753 case MMC_TIMING_MMC_DDR52: in xenon_hs_delay_adj()
Dsdhci_am654.c129 [MMC_TIMING_MMC_DDR52] = {"ti,otap-del-sel-ddr52",
617 if (i <= MMC_TIMING_MMC_DDR52) in sdhci_am654_get_otap_delay()
Dsdhci-omap.c778 if (timing == MMC_TIMING_UHS_DDR50 || timing == MMC_TIMING_MMC_DDR52) in sdhci_omap_set_uhs_signaling()
1042 pinctrl_state[MMC_TIMING_MMC_DDR52] = state; in sdhci_omap_config_iodelay_pinctrl_state()
1048 pinctrl_state[MMC_TIMING_MMC_DDR52] = state; in sdhci_omap_config_iodelay_pinctrl_state()
Dsdhci-brcmstb.c90 (timing == MMC_TIMING_MMC_DDR52)) in sdhci_brcmstb_set_uhs_signaling()
Dsdhci-pci-arasan.c283 case MMC_TIMING_MMC_DDR52: in arasan_select_phy_clock()
Dsdhci-cadence.c288 case MMC_TIMING_MMC_DDR52: in sdhci_cdns_set_uhs_signaling()
Dsunxi-mmc.c741 ios->timing != MMC_TIMING_MMC_DDR52) { in sunxi_mmc_clk_set_phase()
786 if (ios->timing == MMC_TIMING_MMC_DDR52 && in sunxi_mmc_clk_set_rate()
891 ios->timing == MMC_TIMING_MMC_DDR52) in sunxi_mmc_set_clk()
Dsdhci-st.c292 case MMC_TIMING_MMC_DDR52: in sdhci_st_set_uhs_signaling()
Dsdhci-of-at91.c103 if (timing == MMC_TIMING_MMC_DDR52) in sdhci_at91_set_uhs_signaling()
Dsdhci-of-dwcmshc.c150 (timing == MMC_TIMING_MMC_DDR52)) in dwcmshc_set_uhs_signaling()
Ddw_mmc-exynos.c309 case MMC_TIMING_MMC_DDR52: in dw_mci_exynos_set_ios()
Dsdhci-pxav3.c267 case MMC_TIMING_MMC_DDR52: in pxav3_set_uhs_signaling()
Dmmci_stm32_sdmmc.c199 if (host->mmc->ios.timing == MMC_TIMING_MMC_DDR52 || in mmci_sdmmc_set_clkreg()
Dmeson-gx-mmc.c562 case MMC_TIMING_MMC_DDR52: in meson_mmc_prepare_ios_clock()
582 case MMC_TIMING_MMC_DDR52: in meson_mmc_check_resampling()
Drtsx_pci_sdmmc.c1027 case MMC_TIMING_MMC_DDR52: in sd_set_timing()
1108 case MMC_TIMING_MMC_DDR52: in sdmmc_set_ios()
/Linux-v5.15/drivers/mmc/core/
Dhost.h73 return card->host->ios.timing == MMC_TIMING_MMC_DDR52; in mmc_card_ddr52()
Ddebugfs.c144 case MMC_TIMING_MMC_DDR52: in mmc_ios_show()
Dhost.c250 &map->phase[MMC_TIMING_MMC_DDR52]); in mmc_of_parse_clk_phase()
/Linux-v5.15/include/linux/mmc/
Dhost.h61 #define MMC_TIMING_MMC_DDR52 8 macro
/Linux-v5.15/drivers/staging/greybus/
Dsdio.c668 case MMC_TIMING_MMC_DDR52: in gb_mmc_set_ios()

12