Searched refs:MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO (Results 1 – 2 of 2) sorted by relevance
87 MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO); in mlx5e_tir_builder_build_lro()
3313 MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO = 0x2, enumerator