Searched refs:MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO (Results 1 – 2 of 2) sorted by relevance
86 MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO | in mlx5e_tir_builder_build_lro()
3312 MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO = 0x1, enumerator