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Searched refs:MLX5_GET (Results 1 – 25 of 78) sorted by relevance

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/Linux-v5.15/drivers/net/ethernet/mellanox/mlx5/core/steering/
Ddr_ste.c673 spec->gre_c_present = MLX5_GET(fte_match_set_misc, mask, gre_c_present); in dr_ste_copy_mask_misc()
674 spec->gre_k_present = MLX5_GET(fte_match_set_misc, mask, gre_k_present); in dr_ste_copy_mask_misc()
675 spec->gre_s_present = MLX5_GET(fte_match_set_misc, mask, gre_s_present); in dr_ste_copy_mask_misc()
676 spec->source_vhca_port = MLX5_GET(fte_match_set_misc, mask, source_vhca_port); in dr_ste_copy_mask_misc()
677 spec->source_sqn = MLX5_GET(fte_match_set_misc, mask, source_sqn); in dr_ste_copy_mask_misc()
679 spec->source_port = MLX5_GET(fte_match_set_misc, mask, source_port); in dr_ste_copy_mask_misc()
680 spec->source_eswitch_owner_vhca_id = MLX5_GET(fte_match_set_misc, mask, in dr_ste_copy_mask_misc()
683 spec->outer_second_prio = MLX5_GET(fte_match_set_misc, mask, outer_second_prio); in dr_ste_copy_mask_misc()
684 spec->outer_second_cfi = MLX5_GET(fte_match_set_misc, mask, outer_second_cfi); in dr_ste_copy_mask_misc()
685 spec->outer_second_vid = MLX5_GET(fte_match_set_misc, mask, outer_second_vid); in dr_ste_copy_mask_misc()
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Ddr_cmd.c60 *gvmi = MLX5_GET(query_hca_cap_out, out, capability.cmd_hca_cap.vhca_id); in mlx5dr_cmd_query_gvmi()
104 *roce_en = MLX5_GET(query_nic_vport_context_out, out, in dr_cmd_query_nic_vport_roce_en()
220 output->status = MLX5_GET(query_flow_table_out, out, status); in mlx5dr_cmd_query_flow_table()
221 output->level = MLX5_GET(query_flow_table_out, out, flow_table_context.level); in mlx5dr_cmd_query_flow_table()
356 *modify_header_id = MLX5_GET(alloc_modify_header_context_out, out, in mlx5dr_cmd_alloc_modify_header()
398 *group_id = MLX5_GET(create_flow_group_out, out, group_id); in mlx5dr_cmd_create_empty_flow_group()
466 *table_id = MLX5_GET(create_flow_table_out, out, table_id); in mlx5dr_cmd_create_flow_table()
470 (u64)MLX5_GET(create_flow_table_out, out, icm_address_31_0) | in mlx5dr_cmd_create_flow_table()
471 (u64)MLX5_GET(create_flow_table_out, out, icm_address_39_32) << 32 | in mlx5dr_cmd_create_flow_table()
472 (u64)MLX5_GET(create_flow_table_out, out, icm_address_63_40) << 40; in mlx5dr_cmd_create_flow_table()
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/Linux-v5.15/drivers/infiniband/hw/mlx5/
Ddevx.c141 uid = MLX5_GET(create_uctx_out, out, uid); in mlx5_ib_devx_create()
272 return MLX5_GET(affiliated_event_header, &eqe->data, obj_type); in get_event_obj_type()
295 return MLX5_GET(general_obj_out_cmd_hdr, out, obj_id); in devx_get_created_obj_id()
297 return MLX5_GET(create_umem_out, out, umem_id); in devx_get_created_obj_id()
299 return MLX5_GET(create_mkey_out, out, mkey_index); in devx_get_created_obj_id()
301 return MLX5_GET(create_cq_out, out, cqn); in devx_get_created_obj_id()
303 return MLX5_GET(alloc_pd_out, out, pd); in devx_get_created_obj_id()
305 return MLX5_GET(alloc_transport_domain_out, out, in devx_get_created_obj_id()
308 return MLX5_GET(create_rmp_out, out, rmpn); in devx_get_created_obj_id()
310 return MLX5_GET(create_sq_out, out, sqn); in devx_get_created_obj_id()
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Dcong.c101 return MLX5_GET(cong_control_r_roce_ecn_rp, field, in mlx5_get_cc_param_val()
104 return MLX5_GET(cong_control_r_roce_ecn_rp, field, in mlx5_get_cc_param_val()
107 return MLX5_GET(cong_control_r_roce_ecn_rp, field, in mlx5_get_cc_param_val()
110 return MLX5_GET(cong_control_r_roce_ecn_rp, field, in mlx5_get_cc_param_val()
113 return MLX5_GET(cong_control_r_roce_ecn_rp, field, in mlx5_get_cc_param_val()
116 return MLX5_GET(cong_control_r_roce_ecn_rp, field, in mlx5_get_cc_param_val()
119 return MLX5_GET(cong_control_r_roce_ecn_rp, field, in mlx5_get_cc_param_val()
122 return MLX5_GET(cong_control_r_roce_ecn_rp, field, in mlx5_get_cc_param_val()
125 return MLX5_GET(cong_control_r_roce_ecn_rp, field, in mlx5_get_cc_param_val()
128 return MLX5_GET(cong_control_r_roce_ecn_rp, field, in mlx5_get_cc_param_val()
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Dsrq_cmd.c57 if (MLX5_GET(wq, wq, wq_signature)) in get_wq()
59 in->log_page_size = MLX5_GET(wq, wq, log_wq_pg_sz); in get_wq()
60 in->wqe_shift = MLX5_GET(wq, wq, log_wq_stride) - 4; in get_wq()
61 in->log_size = MLX5_GET(wq, wq, log_wq_sz); in get_wq()
62 in->page_offset = MLX5_GET(wq, wq, page_offset); in get_wq()
63 in->lwm = MLX5_GET(wq, wq, lwm); in get_wq()
64 in->pd = MLX5_GET(wq, wq, pd); in get_wq()
70 if (MLX5_GET(srqc, srqc, wq_signature)) in get_srqc()
72 in->log_page_size = MLX5_GET(srqc, srqc, log_page_size); in get_srqc()
73 in->wqe_shift = MLX5_GET(srqc, srqc, log_rq_stride); in get_srqc()
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Dqpc.c227 qp->qpn = MLX5_GET(create_dct_out, out, dctn); in mlx5_core_create_dct()
228 qp->uid = MLX5_GET(create_dct_in, in, uid); in mlx5_core_create_dct()
252 qp->uid = MLX5_GET(create_qp_in, in, uid); in mlx5_qpc_create_qp()
253 qp->qpn = MLX5_GET(create_qp_out, out, qpn); in mlx5_qpc_create_qp()
350 ece = MLX5_GET(init2init_qp_out, out, ece); in get_ece_from_mbox()
353 ece = MLX5_GET(init2rtr_qp_out, out, ece); in get_ece_from_mbox()
356 ece = MLX5_GET(rtr2rts_qp_out, out, ece); in get_ece_from_mbox()
359 ece = MLX5_GET(rts2rts_qp_out, out, ece); in get_ece_from_mbox()
362 ece = MLX5_GET(rst2init_qp_out, out, ece); in get_ece_from_mbox()
538 *xrcdn = MLX5_GET(alloc_xrcd_out, out, xrcd); in mlx5_core_xrcd_alloc()
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Dqp.c1300 MLX5_SET(sqc, sqc, user_index, MLX5_GET(qpc, qpc, user_index)); in create_raw_packet_qp_sq()
1301 MLX5_SET(sqc, sqc, cqn, MLX5_GET(qpc, qpc, cqn_snd)); in create_raw_packet_qp_sq()
1310 MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); in create_raw_packet_qp_sq()
1311 MLX5_SET(wq, wq, uar_page, MLX5_GET(qpc, qpc, uar_page)); in create_raw_packet_qp_sq()
1314 MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_sq_size)); in create_raw_packet_qp_sq()
1388 MLX5_SET(rqc, rqc, user_index, MLX5_GET(qpc, qpc, user_index)); in create_raw_packet_qp_rq()
1389 MLX5_SET(rqc, rqc, cqn, MLX5_GET(qpc, qpc, cqn_rcv)); in create_raw_packet_qp_rq()
1399 MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); in create_raw_packet_qp_rq()
1401 MLX5_SET(wq, wq, log_wq_stride, MLX5_GET(qpc, qpc, log_rq_stride) + 4); in create_raw_packet_qp_rq()
1404 MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_rq_size)); in create_raw_packet_qp_rq()
[all …]
/Linux-v5.15/include/linux/mlx5/
Dfs_helpers.h46 return MLX5_GET(fte_match_set_misc, misc_params_c, outer_esp_spi); in mlx5_fs_is_ipsec_flow()
57 return MLX5_GET(fte_match_set_lyr_2_4, headers_c, ip_protocol) == 0xff && in _mlx5_fs_is_outer_ipproto_flow()
58 MLX5_GET(fte_match_set_lyr_2_4, headers_v, ip_protocol) == match; in _mlx5_fs_is_outer_ipproto_flow()
78 return MLX5_GET(fte_match_set_misc, misc_params_c, vxlan_vni); in mlx5_fs_is_vxlan_flow()
106 return MLX5_GET(fte_match_set_lyr_2_4, headers_c, in _mlx5_fs_is_outer_ipv_flow()
108 MLX5_GET(fte_match_set_lyr_2_4, headers_v, in _mlx5_fs_is_outer_ipv_flow()
112 return MLX5_GET(fte_match_set_lyr_2_4, headers_c, in _mlx5_fs_is_outer_ipv_flow()
114 MLX5_GET(fte_match_set_lyr_2_4, headers_v, in _mlx5_fs_is_outer_ipv_flow()
139 return MLX5_GET(fte_match_set_misc, misc_params_c, outer_esp_spi); in mlx5_fs_is_outer_ipsec_flow()
Ddevice.h95 #define MLX5_GET(typ, p, fld) ((be32_to_cpu(*((__be32 *)(p) +\ macro
100 u32 ___t = MLX5_GET(typ, p, fld); \
149 tmp = (__force type_t)MLX5_GET(typ, p, fld); \
152 tmp = (__force type_t)cpu_to_be16(MLX5_GET(typ, p, fld)); \
155 tmp = (__force type_t)cpu_to_be32(MLX5_GET(typ, p, fld)); \
1219 MLX5_GET(cmd_hca_cap, mdev->caps.hca[MLX5_CAP_GENERAL]->cur, cap)
1225 MLX5_GET(cmd_hca_cap, mdev->caps.hca[MLX5_CAP_GENERAL]->max, cap)
1228 MLX5_GET(cmd_hca_cap_2, mdev->caps.hca[MLX5_CAP_GENERAL_2]->cur, cap)
1234 MLX5_GET(cmd_hca_cap_2, mdev->caps.hca[MLX5_CAP_GENERAL_2]->max, cap)
1237 MLX5_GET(per_protocol_networking_offload_caps,\
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/Linux-v5.15/drivers/net/ethernet/mellanox/mlx5/core/diag/
Dfs_tracepoint.c41 {.m = MLX5_GET(spec, mask, fld),\
42 .v = MLX5_GET(spec, val, fld)}
50 (name.m = MLX5_GET(type, mask, fld), \
51 name.v = MLX5_GET(type, val, fld), \
69 .m = MLX5_GET(fte_match_set_lyr_2_4, mask, smac_47_16) << 16 | in print_lyr_2_4_hdrs()
70 MLX5_GET(fte_match_set_lyr_2_4, mask, smac_15_0), in print_lyr_2_4_hdrs()
71 .v = MLX5_GET(fte_match_set_lyr_2_4, value, smac_47_16) << 16 | in print_lyr_2_4_hdrs()
72 MLX5_GET(fte_match_set_lyr_2_4, value, smac_15_0)}; in print_lyr_2_4_hdrs()
74 .m = MLX5_GET(fte_match_set_lyr_2_4, mask, dmac_47_16) << 16 | in print_lyr_2_4_hdrs()
75 MLX5_GET(fte_match_set_lyr_2_4, mask, dmac_15_0), in print_lyr_2_4_hdrs()
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Dfw_tracer.c55 if (!MLX5_GET(mtrc_cap, out, trace_to_memory)) { in mlx5_query_mtrc_caps()
60 tracer->trc_ver = MLX5_GET(mtrc_cap, out, trc_ver); in mlx5_query_mtrc_caps()
62 MLX5_GET(mtrc_cap, out, first_string_trace); in mlx5_query_mtrc_caps()
64 MLX5_GET(mtrc_cap, out, num_string_trace); in mlx5_query_mtrc_caps()
65 tracer->str_db.num_string_db = MLX5_GET(mtrc_cap, out, num_string_db); in mlx5_query_mtrc_caps()
66 tracer->owner = !!MLX5_GET(mtrc_cap, out, trace_owner); in mlx5_query_mtrc_caps()
70 string_db_base_address_out[i] = MLX5_GET(mtrc_string_db_param, in mlx5_query_mtrc_caps()
73 string_db_size_out[i] = MLX5_GET(mtrc_string_db_param, in mlx5_query_mtrc_caps()
107 tracer->owner = !!MLX5_GET(mtrc_cap, out, trace_owner); in mlx5_fw_tracer_ownership_acquire()
460 tracer_event->event_id = MLX5_GET(tracer_event, trace, event_id); in poll_trace()
[all …]
Drsc_dump.c64 num_of_items = MLX5_GET(resource_dump_menu_segment, menu, num_of_records); in mlx5_rsc_dump_read_menu_sgmt()
72 rsc_dump->fw_segment_type[sgmt_idx] = MLX5_GET(resource_dump_menu_record, in mlx5_rsc_dump_read_menu_sgmt()
91 in_seq_num = MLX5_GET(resource_dump, cmd->cmd, seq_num); in mlx5_rsc_dump_trigger()
101 out_seq_num = MLX5_GET(resource_dump, cmd->cmd, seq_num); in mlx5_rsc_dump_trigger()
158 *size = MLX5_GET(resource_dump, cmd->cmd, size); in mlx5_rsc_dump_next()
159 more_dump = MLX5_GET(resource_dump, cmd->cmd, more_dump); in mlx5_rsc_dump_next()
/Linux-v5.15/drivers/net/ethernet/mellanox/mlx5/core/
Ddebugfs.c231 state = MLX5_GET(qpc, qpc, state); in qp_read_field()
236 param = (unsigned long)mlx5_qp_type_str(MLX5_GET(qpc, qpc, st)); in qp_read_field()
240 switch (MLX5_GET(qpc, qpc, mtu)) { in qp_read_field()
261 param = 1 << MLX5_GET(qpc, qpc, log_rq_size); in qp_read_field()
264 param = 1 << (MLX5_GET(qpc, qpc, log_rq_stride) + 4); in qp_read_field()
267 if (!MLX5_GET(qpc, qpc, no_sq)) in qp_read_field()
268 param = 1 << MLX5_GET(qpc, qpc, log_sq_size); in qp_read_field()
271 param = MLX5_GET(qpc, qpc, log_page_size) + 12; in qp_read_field()
274 param = MLX5_GET(qpc, qpc, remote_qpn); in qp_read_field()
307 param = 1 << MLX5_GET(eqc, ctx, log_eq_size); in eq_read_field()
[all …]
Dwq.c41 u8 log_wq_stride = MLX5_GET(wq, wqc, log_wq_stride); in mlx5_wq_cyc_create()
42 u8 log_wq_sz = MLX5_GET(wq, wqc, log_wq_sz); in mlx5_wq_cyc_create()
103 u8 log_rq_stride = MLX5_GET(qpc, qpc, log_rq_stride) + 4; in mlx5_wq_qp_create()
104 u8 log_rq_sz = MLX5_GET(qpc, qpc, log_rq_size); in mlx5_wq_qp_create()
106 u8 log_sq_sz = MLX5_GET(qpc, qpc, log_sq_size); in mlx5_wq_qp_create()
164 u8 log_wq_stride = MLX5_GET(cqc, cqc, cqe_sz) == CQE_STRIDE_64 ? 6 : 7; in mlx5_cqwq_create()
165 u8 log_wq_sz = MLX5_GET(cqc, cqc, log_cq_size); in mlx5_cqwq_create()
214 u8 log_wq_stride = MLX5_GET(wq, wqc, log_wq_stride); in mlx5_wq_ll_create()
215 u8 log_wq_sz = MLX5_GET(wq, wqc, log_wq_sz); in mlx5_wq_ll_create()
Dmr.c54 mkey_index = MLX5_GET(create_mkey_out, lout, mkey_index); in mlx5_core_create_mkey()
58 mkey->pd = MLX5_GET(mkc, mkc, pd); in mlx5_core_create_mkey()
92 case 1: return MLX5_GET(create_psv_out, out, psv1_index); in mlx5_get_psv()
93 case 2: return MLX5_GET(create_psv_out, out, psv2_index); in mlx5_get_psv()
94 case 3: return MLX5_GET(create_psv_out, out, psv3_index); in mlx5_get_psv()
95 default: return MLX5_GET(create_psv_out, out, psv0_index); in mlx5_get_psv()
Dport.c168 *link_width_oper = MLX5_GET(ptys_reg, out, ib_link_width_oper); in mlx5_query_ib_port_oper()
169 *proto_oper = MLX5_GET(ptys_reg, out, ib_proto_oper); in mlx5_query_ib_port_oper()
213 *status = MLX5_GET(paos_reg, out, admin_status); in mlx5_query_port_admin_status()
229 *max_mtu = MLX5_GET(pmtu_reg, out, max_mtu); in mlx5_query_port_mtu()
231 *oper_mtu = MLX5_GET(pmtu_reg, out, oper_mtu); in mlx5_query_port_mtu()
233 *admin_mtu = MLX5_GET(pmtu_reg, out, admin_mtu); in mlx5_query_port_mtu()
275 module_mapping = MLX5_GET(pmlp_reg, out, lane0_module_mapping); in mlx5_query_module_num()
301 status = MLX5_GET(mcia_reg, out, status); in mlx5_query_module_id()
379 status = MLX5_GET(mcia_reg, out, status); in mlx5_query_mcia()
494 *vl_hw_cap = MLX5_GET(pvlc_reg, out, vl_hw_cap); in mlx5_query_port_vl_hw_cap()
[all …]
Dfw.c114 *vendor_id = MLX5_GET(query_adapter_out, out, in mlx5_core_query_vendor_id()
311 force_state = MLX5_GET(teardown_hca_out, out, state); in mlx5_cmd_force_teardown_hca()
342 state = MLX5_GET(teardown_hca_out, out, state); in mlx5_cmd_fast_teardown_hca()
413 *update_handle = MLX5_GET(mcc_reg, out, update_handle); in mlx5_reg_mcc_query()
414 *error_code = MLX5_GET(mcc_reg, out, error_code); in mlx5_reg_mcc_query()
415 *control_state = MLX5_GET(mcc_reg, out, control_state); in mlx5_reg_mcc_query()
491 *max_component_size = MLX5_GET(mcqi_cap, mcqi_reg, max_component_size); in mlx5_reg_mcqi_caps_query()
492 *log_mcda_word_size = MLX5_GET(mcqi_cap, mcqi_reg, log_mcda_word_size); in mlx5_reg_mcqi_caps_query()
493 *mcda_max_write_size = MLX5_GET(mcqi_cap, mcqi_reg, mcda_max_write_size); in mlx5_reg_mcqi_caps_query()
649 *status = MLX5_GET(mirc_reg, out, status_code); in mlx5_fsm_reactivate()
[all …]
/Linux-v5.15/drivers/net/ethernet/mellanox/mlx5/core/lib/
Dport_tun.c34 entropy_flags->force_supported = !!(MLX5_GET(pcmr_reg, out, entropy_force_cap)); in mlx5_query_port_tun_entropy()
35 entropy_flags->calc_supported = !!(MLX5_GET(pcmr_reg, out, entropy_calc_cap)); in mlx5_query_port_tun_entropy()
36 entropy_flags->gre_calc_supported = !!(MLX5_GET(pcmr_reg, out, entropy_gre_calc_cap)); in mlx5_query_port_tun_entropy()
37 entropy_flags->force_enabled = !!(MLX5_GET(pcmr_reg, out, entropy_force)); in mlx5_query_port_tun_entropy()
38 entropy_flags->calc_enabled = !!(MLX5_GET(pcmr_reg, out, entropy_calc)); in mlx5_query_port_tun_entropy()
39 entropy_flags->gre_calc_enabled = !!(MLX5_GET(pcmr_reg, out, entropy_gre_calc)); in mlx5_query_port_tun_entropy()
Dclock.c636 if (err || !MLX5_GET(mtpps_reg, out, enable)) in mlx5_get_pps_pin_mode()
639 mode = MLX5_GET(mtpps_reg, out, pin_mode); in mlx5_get_pps_pin_mode()
683 clock->ptp_info.n_pins = MLX5_GET(mtpps_reg, out, in mlx5_get_pps_caps()
685 clock->ptp_info.n_ext_ts = MLX5_GET(mtpps_reg, out, in mlx5_get_pps_caps()
687 clock->ptp_info.n_per_out = MLX5_GET(mtpps_reg, out, in mlx5_get_pps_caps()
690 clock->pps_info.pin_caps[0] = MLX5_GET(mtpps_reg, out, cap_pin_0_mode); in mlx5_get_pps_caps()
691 clock->pps_info.pin_caps[1] = MLX5_GET(mtpps_reg, out, cap_pin_1_mode); in mlx5_get_pps_caps()
692 clock->pps_info.pin_caps[2] = MLX5_GET(mtpps_reg, out, cap_pin_2_mode); in mlx5_get_pps_caps()
693 clock->pps_info.pin_caps[3] = MLX5_GET(mtpps_reg, out, cap_pin_3_mode); in mlx5_get_pps_caps()
694 clock->pps_info.pin_caps[4] = MLX5_GET(mtpps_reg, out, cap_pin_4_mode); in mlx5_get_pps_caps()
[all …]
/Linux-v5.15/drivers/net/ethernet/mellanox/mlx5/core/fpga/
Dtls.c177 u32 syndrome = MLX5_GET(tls_resp, resp->sg[0].data, syndrome); in mlx5_fpga_tls_teardown_completion()
192 MLX5_SET(tls_cmd, cmd, ipv6, MLX5_GET(tls_flow, flow, ipv6)); in mlx5_fpga_tls_flow_to_cmd()
194 MLX5_GET(tls_flow, flow, direction_sx)); in mlx5_fpga_tls_flow_to_cmd()
317 ctx->syndrome = MLX5_GET(tls_resp, resp->sg[0].data, syndrome); in mlx5_fpga_tls_setup_completion()
338 MLX5_GET(tls_cmd, tls_cmd, swid), in mlx5_fpga_tls_setup_completion()
340 MLX5_GET(tls_cmd, tls_cmd, in mlx5_fpga_tls_setup_completion()
421 if (MLX5_GET(tls_extended_cap, buf, tx)) in mlx5_fpga_tls_get_caps()
423 if (MLX5_GET(tls_extended_cap, buf, rx)) in mlx5_fpga_tls_get_caps()
425 if (MLX5_GET(tls_extended_cap, buf, tls_v12)) in mlx5_fpga_tls_get_caps()
427 if (MLX5_GET(tls_extended_cap, buf, tls_v13)) in mlx5_fpga_tls_get_caps()
[all …]
Dcmd.c136 query->status = MLX5_GET(fpga_ctrl, out, status); in mlx5_fpga_query()
137 query->admin_image = MLX5_GET(fpga_ctrl, out, flash_select_admin); in mlx5_fpga_query()
138 query->oper_image = MLX5_GET(fpga_ctrl, out, flash_select_oper); in mlx5_fpga_query()
159 *fpga_qpn = MLX5_GET(fpga_create_qp_out, out, fpga_qpn); in mlx5_fpga_create_qp()
Dipsec.c284 if (MLX5_GET(ipsec_extended_cap, fipsec->caps, v2_command)) in is_v2_sadb_supported()
342 if (MLX5_GET(ipsec_extended_cap, fdev->ipsec->caps, esp)) in mlx5_fpga_ipsec_device_caps()
345 if (MLX5_GET(ipsec_extended_cap, fdev->ipsec->caps, ipv6)) in mlx5_fpga_ipsec_device_caps()
348 if (MLX5_GET(ipsec_extended_cap, fdev->ipsec->caps, lso)) in mlx5_fpga_ipsec_device_caps()
351 if (MLX5_GET(ipsec_extended_cap, fdev->ipsec->caps, rx_no_trailer)) in mlx5_fpga_ipsec_device_caps()
354 if (MLX5_GET(ipsec_extended_cap, fdev->ipsec->caps, esn)) { in mlx5_fpga_ipsec_device_caps()
369 return MLX5_GET(ipsec_extended_cap, fdev->ipsec->caps, in mlx5_fpga_ipsec_counters_count()
386 addr = (u64)MLX5_GET(ipsec_extended_cap, fdev->ipsec->caps, in mlx5_fpga_ipsec_counters_read()
388 ((u64)MLX5_GET(ipsec_extended_cap, fdev->ipsec->caps, in mlx5_fpga_ipsec_counters_read()
647 bool is_dmac = MLX5_GET(fte_match_set_lyr_2_4, outer_c, dmac_47_16) || in mlx5_is_fpga_egress_ipsec_rule()
[all …]
/Linux-v5.15/drivers/vdpa/mlx5/core/
Dresources.c21 *pdn = MLX5_GET(alloc_pd_out, out, pd); in alloc_pd()
47 *null_mkey = MLX5_GET(query_special_contexts_out, out, null_mkey); in get_null_mkey()
76 *uid = MLX5_GET(create_uctx_out, out, uid); in create_uctx()
104 *tisn = MLX5_GET(create_tis_out, out, tisn); in mlx5_vdpa_create_tis()
127 *rqtn = MLX5_GET(create_rqt_out, out, rqtn); in mlx5_vdpa_create_rqt()
160 *tirn = MLX5_GET(create_tir_out, out, tirn); in mlx5_vdpa_create_tir()
186 *tdn = MLX5_GET(alloc_transport_domain_out, out, transport_domain); in mlx5_vdpa_alloc_transport_domain()
217 mkey_index = MLX5_GET(create_mkey_out, lout, mkey_index); in mlx5_vdpa_create_mkey()
221 mkey->pd = MLX5_GET(mkc, mkc, pd); in mlx5_vdpa_create_mkey()
/Linux-v5.15/drivers/net/ethernet/mellanox/mlx5/core/en/
Dport_buffer.c57 MLX5_GET(bufferx_reg, buffer, lossy); in mlx5e_port_query_buffer()
59 MLX5_GET(bufferx_reg, buffer, epsb); in mlx5e_port_query_buffer()
61 MLX5_GET(bufferx_reg, buffer, size) * port_buff_cell_sz; in mlx5e_port_query_buffer()
63 MLX5_GET(bufferx_reg, buffer, xon_threshold) * port_buff_cell_sz; in mlx5e_port_query_buffer()
65 MLX5_GET(bufferx_reg, buffer, xoff_threshold) * port_buff_cell_sz; in mlx5e_port_query_buffer()
77 MLX5_GET(pbmc_reg, out, port_buffer_size) * port_buff_cell_sz; in mlx5e_port_query_buffer()
Dport.c142 *an_status = MLX5_GET(ptys_reg, out, an_status); in mlx5_port_query_eth_autoneg()
143 *an_disable_cap = MLX5_GET(ptys_reg, out, an_disable_cap); in mlx5_port_query_eth_autoneg()
144 *an_disable_admin = MLX5_GET(ptys_reg, out, an_disable_admin); in mlx5_port_query_eth_autoneg()
312 prio_x_buff = MLX5_GET(pptb_reg, out, prio_x_buff); in mlx5e_port_query_priority2buffer()
387 *_policy = MLX5_GET(pplm_reg, _buf, fec_override_admin_##link); \
429 MLX5_GET(pplm_reg, buf, fec_override_cap_##link)
520 *fec_mode_active = MLX5_GET(pplm_reg, out, fec_mode_active); in mlx5e_get_fec_mode()

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