Searched refs:MC_SEQ_MISC_TIMING_LP (Results 1 – 12 of 12) sorted by relevance
149 #define MC_SEQ_MISC_TIMING_LP 0x2a74 macro
807 #define MC_SEQ_MISC_TIMING_LP 0x2a74 macro
1865 *out_reg = MC_SEQ_MISC_TIMING_LP >> 2; in btc_check_s0_mc_reg_index()2030 WREG32(MC_SEQ_MISC_TIMING_LP, RREG32(MC_SEQ_MISC_TIMING)); in btc_initialize_mc_reg_table()
575 #define MC_SEQ_MISC_TIMING_LP 0x2a74 macro
700 #define MC_SEQ_MISC_TIMING_LP 0x2a74 macro
325 #define MC_SEQ_MISC_TIMING_LP 0x2a74 macro
2781 *out_reg = MC_SEQ_MISC_TIMING_LP >> 2; in ni_check_s0_mc_reg_index()2886 WREG32(MC_SEQ_MISC_TIMING_LP, RREG32(MC_SEQ_MISC_TIMING)); in ni_initialize_mc_reg_table()
978 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_MISC_TIMING_LP >> 2; in cypress_set_mc_reg_address_table()
5418 *out_reg = MC_SEQ_MISC_TIMING_LP >> 2; in si_check_s0_mc_reg_index()5527 WREG32(MC_SEQ_MISC_TIMING_LP, RREG32(MC_SEQ_MISC_TIMING)); in si_initialize_mc_reg_table()
4395 *out_reg = MC_SEQ_MISC_TIMING_LP >> 2; in ci_check_s0_mc_reg_index()4608 WREG32(MC_SEQ_MISC_TIMING_LP, RREG32(MC_SEQ_MISC_TIMING)); in ci_initialize_mc_reg_table()
576 #define MC_SEQ_MISC_TIMING_LP 0xA9D macro
5871 *out_reg = MC_SEQ_MISC_TIMING_LP; in si_check_s0_mc_reg_index()5980 WREG32(MC_SEQ_MISC_TIMING_LP, RREG32(MC_SEQ_MISC_TIMING)); in si_initialize_mc_reg_table()
