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Searched refs:MASTER_COMM_CNTL_REG__MASTER_COMM_INTERRUPT__SHIFT (Results 1 – 14 of 14) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_sh_mask.h7672 #define MASTER_COMM_CNTL_REG__MASTER_COMM_INTERRUPT__SHIFT 0x00000000 macro
Ddce_8_0_sh_mask.h8152 #define MASTER_COMM_CNTL_REG__MASTER_COMM_INTERRUPT__SHIFT 0x0 macro
Ddce_11_0_sh_mask.h7106 #define MASTER_COMM_CNTL_REG__MASTER_COMM_INTERRUPT__SHIFT 0x0 macro
Ddce_10_0_sh_mask.h7216 #define MASTER_COMM_CNTL_REG__MASTER_COMM_INTERRUPT__SHIFT 0x0 macro
Ddce_11_2_sh_mask.h8218 #define MASTER_COMM_CNTL_REG__MASTER_COMM_INTERRUPT__SHIFT 0x0 macro
Ddce_12_0_sh_mask.h5119 #define MASTER_COMM_CNTL_REG__MASTER_COMM_INTERRUPT__SHIFT … macro
/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_sh_mask.h1750 #define MASTER_COMM_CNTL_REG__MASTER_COMM_INTERRUPT__SHIFT … macro
Ddcn_2_1_0_sh_mask.h2644 #define MASTER_COMM_CNTL_REG__MASTER_COMM_INTERRUPT__SHIFT … macro
Ddcn_3_0_1_sh_mask.h2845 #define MASTER_COMM_CNTL_REG__MASTER_COMM_INTERRUPT__SHIFT … macro
Ddcn_1_0_sh_mask.h4138 #define MASTER_COMM_CNTL_REG__MASTER_COMM_INTERRUPT__SHIFT … macro
Ddcn_3_1_2_sh_mask.h2321 #define MASTER_COMM_CNTL_REG__MASTER_COMM_INTERRUPT__SHIFT … macro
Ddcn_3_0_2_sh_mask.h2805 #define MASTER_COMM_CNTL_REG__MASTER_COMM_INTERRUPT__SHIFT … macro
Ddcn_2_0_0_sh_mask.h2912 #define MASTER_COMM_CNTL_REG__MASTER_COMM_INTERRUPT__SHIFT … macro
Ddcn_3_0_0_sh_mask.h2901 #define MASTER_COMM_CNTL_REG__MASTER_COMM_INTERRUPT__SHIFT … macro