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Searched refs:IS_CHERRYVIEW (Results 1 – 25 of 50) sorted by relevance

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/Linux-v5.15/drivers/gpu/drm/i915/display/
Dg4x_dp.c67 return IS_CHERRYVIEW(i915) ? &chv_dpll[0].dpll : &vlv_dpll[0].dpll; in vlv_get_dpll()
83 } else if (IS_CHERRYVIEW(dev_priv)) { in g4x_dp_set_clock()
177 if (IS_CHERRYVIEW(dev_priv)) in intel_dp_prepare()
306 else if (IS_CHERRYVIEW(dev_priv)) in g4x_dp_port_enabled()
486 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_dp_link_down()
677 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_enable_dp()
687 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_enable_dp()
690 if (IS_CHERRYVIEW(dev_priv)) in intel_enable_dp()
1290 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_dp_encoder_reset()
1340 if (IS_CHERRYVIEW(dev_priv)) { in g4x_dp_init()
[all …]
Dintel_pipe_crc.c154 if (!IS_CHERRYVIEW(dev_priv)) in vlv_pipe_crc_ctl_reg()
417 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in get_new_crc_ctl_reg()
547 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_is_valid_crc_source()
623 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_crtc_set_crc_source()
Di9xx_plane.c144 if (IS_CHERRYVIEW(dev_priv)) in i9xx_plane_has_windowing()
462 } else if (IS_CHERRYVIEW(dev_priv) && i9xx_plane == PLANE_B) { in i9xx_update_plane()
799 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_primary_plane_create()
833 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_primary_plane_create()
859 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_primary_plane_create()
896 if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) { in intel_primary_plane_create()
1000 if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B && in i9xx_get_initial_plane_config()
Dintel_pps.c76 if (IS_CHERRYVIEW(dev_priv)) in vlv_power_sequencer_kick()
88 release_cl_override = IS_CHERRYVIEW(dev_priv) && in vlv_power_sequencer_kick()
367 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_pps_get_registers()
409 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in edp_have_panel_power()
422 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in edp_have_panel_vdd()
1298 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in pps_init_registers()
1359 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in intel_pps_encoder_reset()
1389 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_pps_unlock_regs_wa()
1406 else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in intel_pps_setup()
Dintel_lpe_audio.c120 pdata->num_ports = IS_CHERRYVIEW(dev_priv) ? 3 : 2; /* B,C,D or B,C */ in lpe_audio_platdev_create()
185 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in lpe_audio_detect()
Dintel_vga.c17 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in intel_vga_cntrl_reg()
Dg4x_hdmi.c50 else if (IS_CHERRYVIEW(dev_priv)) in intel_hdmi_prepare()
567 if (IS_CHERRYVIEW(dev_priv)) { in g4x_hdmi_init()
591 if (IS_CHERRYVIEW(dev_priv)) { in g4x_hdmi_init()
Dintel_cdclk.c504 if (IS_CHERRYVIEW(dev_priv)) in vlv_program_pfi_credits()
511 if (IS_CHERRYVIEW(dev_priv)) in vlv_program_pfi_credits()
2050 else if (IS_CHERRYVIEW(dev_priv)) in intel_pixel_rate_to_cdclk()
2118 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_crtc_compute_min_cdclk()
2603 else if (IS_CHERRYVIEW(dev_priv)) in intel_compute_max_dotclk()
2672 } else if (IS_CHERRYVIEW(dev_priv)) { in intel_update_max_cdclk()
2706 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_update_cdclk()
2837 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_read_rawclk()
2911 } else if (IS_CHERRYVIEW(dev_priv)) { in intel_init_cdclk_hooks()
2932 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_init_cdclk_hooks()
Dintel_sprite.c457 if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) in vlv_update_plane()
1408 if (IS_CHERRYVIEW(dev_priv) && in chv_plane_check_rotation()
1504 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_sprite_set_colorkey_ioctl()
1764 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_sprite_plane_create()
1772 if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) { in intel_sprite_plane_create()
1823 if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) { in intel_sprite_plane_create()
Dvlv_dsi_pll.c72 if (IS_CHERRYVIEW(dev_priv)) { in dsi_calc_mnp()
267 int refclk = IS_CHERRYVIEW(dev_priv) ? 100000 : 25000; in vlv_dsi_get_pclk()
Dintel_crtc.c302 if (IS_CHERRYVIEW(dev_priv) || in intel_crtc_init()
398 bool need_vlv_dsi_wa = (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_pipe_update_start()
Dintel_dsi_vbt.c387 else if (IS_CHERRYVIEW(dev_priv)) in mipi_exec_gpio()
875 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_dsi_vbt_gpio_init()
935 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_dsi_vbt_gpio_cleanup()
Dintel_audio.c707 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in ilk_audio_codec_disable()
768 IS_CHERRYVIEW(dev_priv)) { in ilk_audio_codec_enable()
927 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_init_audio_hooks()
Dintel_display.c352 if (!(IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))) in intel_update_czclk()
602 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in assert_panel_unlocked()
1146 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_linear_alignment()
4005 if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) { in valleyview_crtc_enable()
4018 if (IS_CHERRYVIEW(dev_priv)) { in valleyview_crtc_enable()
4147 if (IS_CHERRYVIEW(dev_priv)) in i9xx_crtc_disable()
4713 return DISPLAY_VER(dev_priv) == 7 || IS_CHERRYVIEW(dev_priv); in transcoder_has_m2_n2()
4944 IS_CHERRYVIEW(dev_priv)) { in i9xx_set_pipeconf()
4976 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in i9xx_set_pipeconf()
5149 IS_CHERRYVIEW(dev_priv)) { in i9xx_get_pipe_config()
[all …]
/Linux-v5.15/drivers/gpu/drm/i915/selftests/
Dintel_uncore.c159 if (IS_VALLEYVIEW(gt->i915) || IS_CHERRYVIEW(gt->i915)) { in live_forcewake_ops()
271 !IS_CHERRYVIEW(gt->i915)) in live_forcewake_domains()
/Linux-v5.15/drivers/gpu/drm/i915/
Di915_sysfs.c523 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in i915_setup_sysfs()
547 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i915_setup_sysfs()
565 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i915_teardown_sysfs()
Dvlv_suspend.c395 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) in vlv_suspend_complete()
440 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) in vlv_resume_prepare()
Di915_irq.c188 IS_CHERRYVIEW(dev_priv)) in intel_hpd_init_pins()
1562 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i9xx_hpd_irq_ack()
1601 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i9xx_hpd_irq_handler()
1616 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in i9xx_hpd_irq_handler()
3002 if (IS_CHERRYVIEW(dev_priv)) in vlv_display_irq_reset()
3036 if (IS_CHERRYVIEW(dev_priv)) in vlv_display_irq_postinstall()
4370 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_irq_init()
4418 if (IS_CHERRYVIEW(dev_priv)) in intel_irq_handler()
4443 if (IS_CHERRYVIEW(dev_priv)) in intel_irq_reset()
4468 if (IS_CHERRYVIEW(dev_priv)) in intel_irq_postinstall()
Di915_drv.c158 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_setup_mchbar()
1596 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) in intel_runtime_suspend()
1642 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) { in intel_runtime_resume()
/Linux-v5.15/drivers/gpu/drm/i915/gt/
Dintel_rc6.c553 if (IS_CHERRYVIEW(i915)) in intel_rc6_init()
591 if (IS_CHERRYVIEW(i915)) in intel_rc6_enable()
758 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { in intel_rc6_residency_ns()
Dintel_rps.c831 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in rps_set()
1386 else if (IS_CHERRYVIEW(i915)) in intel_rps_enable()
1481 else if (IS_CHERRYVIEW(i915)) in intel_gpu_freq()
1498 else if (IS_CHERRYVIEW(i915)) in intel_freq_opcode()
1714 adj = IS_CHERRYVIEW(gt->i915) ? 2 : 1; in rps_work()
1730 adj = IS_CHERRYVIEW(gt->i915) ? -2 : -1; in rps_work()
1857 if (IS_CHERRYVIEW(i915)) in intel_rps_init()
1925 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in intel_rps_get_cagf()
1946 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { in read_cagf()
Dintel_gtt.c363 else if (IS_CHERRYVIEW(i915)) in gtt_write_workarounds()
531 else if (IS_CHERRYVIEW(i915) || IS_GEN9_LP(i915)) in setup_private_pat()
Dselftest_rc6.c51 if (IS_VALLEYVIEW(gt->i915) || IS_CHERRYVIEW(gt->i915)) in live_rc6_manual()
Ddebugfs_gt_pm.c231 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in drpc_show()
263 } else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { in frequency_show()
Dintel_sseu_debugfs.c264 if (IS_CHERRYVIEW(i915)) in intel_sseu_status()

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