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Searched refs:IO_ADDR_W (Results 1 – 24 of 24) sorted by relevance

/Linux-v5.15/drivers/mtd/nand/raw/
Dpasemi_nand.c62 out_8(chip->legacy.IO_ADDR_W + (1 << CLE_PIN_CTL), cmd); in pasemi_hwcontrol()
64 out_8(chip->legacy.IO_ADDR_W + (1 << ALE_PIN_CTL), cmd); in pasemi_hwcontrol()
127 chip->legacy.IO_ADDR_W = chip->legacy.IO_ADDR_R; in pasemi_nand_probe()
Dorion_nand.c49 writeb(cmd, nc->legacy.IO_ADDR_W + offs); in orion_nand_cmd_ctrl()
158 nc->legacy.IO_ADDR_R = nc->legacy.IO_ADDR_W = io_base; in orion_nand_probe()
Dsharpsl.c75 writeb(cmd, chip->legacy.IO_ADDR_W); in sharpsl_nand_hwcontrol()
186 this->legacy.IO_ADDR_W = sharpsl->io + FLASHIO; in sharpsl_nand_probe()
Ds3c2410.c694 writesb(this->legacy.IO_ADDR_W, buf, len); in s3c2410_nand_write_buf()
873 chip->legacy.IO_ADDR_W = regs + S3C2410_NFDATA; in s3c2410_nand_init_chip()
881 chip->legacy.IO_ADDR_W = regs + S3C2440_NFDATA; in s3c2410_nand_init_chip()
891 chip->legacy.IO_ADDR_W = regs + S3C2440_NFDATA; in s3c2410_nand_init_chip()
903 chip->legacy.IO_ADDR_R = chip->legacy.IO_ADDR_W; in s3c2410_nand_init_chip()
Dnand_legacy.c119 iowrite8_rep(chip->legacy.IO_ADDR_W, buf, len); in nand_write_buf()
148 iowrite16_rep(chip->legacy.IO_ADDR_W, p, len >> 1); in nand_write_buf16()
Dtmio_nand.c160 tmio_iowrite8(cmd, chip->legacy.IO_ADDR_W); in tmio_nand_hwcontrol()
428 nand_chip->legacy.IO_ADDR_W = tmio->fcr; in tmio_probe()
Dplat_nand.c78 data->chip.legacy.IO_ADDR_W = data->io_base; in plat_nand_probe()
Domap2.c296 iowrite8(*p++, info->nand.legacy.IO_ADDR_W); in omap_write_buf8()
332 iowrite16(*p++, info->nand.legacy.IO_ADDR_W); in omap_write_buf16()
406 writeb(*buf, info->nand.legacy.IO_ADDR_W); in omap_write_buf_pref()
426 iowrite16(*p++, info->nand.legacy.IO_ADDR_W); in omap_write_buf_pref()
590 iowrite32_rep(info->nand.legacy.IO_ADDR_W, (u32 *)info->buf, in omap_nand_irq()
2283 nand_chip->legacy.IO_ADDR_W = nand_chip->legacy.IO_ADDR_R; in omap_nand_probe()
Dndfc.c150 chip->legacy.IO_ADDR_W = ndfc->ndfcbase + NDFC_DATA; in ndfc_chip_init()
Dlpc32xx_mlc.c747 nand_chip->legacy.IO_ADDR_W = MLC_DATA(host->io_base); in lpc32xx_nand_probe()
Dlpc32xx_slc.c899 chip->legacy.IO_ADDR_W = SLC_DATA(host->io_base); in lpc32xx_nand_probe()
/Linux-v5.15/arch/arm/mach-ep93xx/
Dsnappercl15.c40 #define NAND_CTRL_ADDR(chip) (chip->legacy.IO_ADDR_W + 0x40)
67 chip->legacy.IO_ADDR_W); in snappercl15_nand_cmd_ctrl()
Dts72xx.c92 __raw_writeb(cmd, chip->legacy.IO_ADDR_W); in ts72xx_nand_hwcontrol()
/Linux-v5.15/arch/arm/mach-omap1/
Dboard-nand.c31 writeb(cmd, this->legacy.IO_ADDR_W + mask); in omap1_nand_cmd_ctl()
/Linux-v5.15/arch/mips/alchemy/devboards/
Ddb1550.c133 unsigned long ioaddr = (unsigned long)this->legacy.IO_ADDR_W; in au1550_nand_cmd_ctrl()
145 this->legacy.IO_ADDR_R = this->legacy.IO_ADDR_W = (void __iomem *)ioaddr; in au1550_nand_cmd_ctrl()
147 __raw_writeb(cmd, this->legacy.IO_ADDR_W); in au1550_nand_cmd_ctrl()
Ddb1300.c156 unsigned long ioaddr = (unsigned long)this->legacy.IO_ADDR_W; in au1300_nand_cmd_ctrl()
168 this->legacy.IO_ADDR_R = this->legacy.IO_ADDR_W = (void __iomem *)ioaddr; in au1300_nand_cmd_ctrl()
170 __raw_writeb(cmd, this->legacy.IO_ADDR_W); in au1300_nand_cmd_ctrl()
Ddb1200.c191 unsigned long ioaddr = (unsigned long)this->legacy.IO_ADDR_W; in au1200_nand_cmd_ctrl()
203 this->legacy.IO_ADDR_R = this->legacy.IO_ADDR_W = (void __iomem *)ioaddr; in au1200_nand_cmd_ctrl()
205 __raw_writeb(cmd, this->legacy.IO_ADDR_W); in au1200_nand_cmd_ctrl()
/Linux-v5.15/arch/sh/boards/mach-migor/
Dsetup.c176 writeb(cmd, chip->legacy.IO_ADDR_W + 0x00400000); in migor_nand_flash_cmd_ctl()
178 writeb(cmd, chip->legacy.IO_ADDR_W + 0x00800000); in migor_nand_flash_cmd_ctl()
180 writeb(cmd, chip->legacy.IO_ADDR_W); in migor_nand_flash_cmd_ctl()
/Linux-v5.15/arch/arm/mach-orion5x/
Dts78xx-setup.c147 writeb(cmd, this->legacy.IO_ADDR_W); in ts78xx_ts_nand_cmd_ctrl()
158 void __iomem *io_base = chip->legacy.IO_ADDR_W; in ts78xx_ts_nand_write_buf()
/Linux-v5.15/arch/arm/mach-pxa/
Dpalmtx.c247 char __iomem *nandaddr = this->legacy.IO_ADDR_W; in palmtx_nand_cmd_ctl()
Dballoon3.c593 writeb(cmd, this->legacy.IO_ADDR_W); in balloon3_nand_cmd_ctl()
/Linux-v5.15/arch/mips/rb532/
Ddevices.c151 writeb(cmd, chip->legacy.IO_ADDR_W); in rb532_cmd_ctrl()
/Linux-v5.15/Documentation/driver-api/
Dmtdnand.rst183 case NAND_CTL_SETCLE: this->legacy.IO_ADDR_W |= CLE_ADRR_BIT; break;
184 case NAND_CTL_CLRCLE: this->legacy.IO_ADDR_W &= ~CLE_ADRR_BIT; break;
185 case NAND_CTL_SETALE: this->legacy.IO_ADDR_W |= ALE_ADRR_BIT; break;
186 case NAND_CTL_CLRALE: this->legacy.IO_ADDR_W &= ~ALE_ADRR_BIT; break;
239 this->legacy.IO_ADDR_W = baseaddr;
342 this->legacy.IO_ADDR_W &= ~BOARD_NAND_ADDR_MASK;
346 this->legacy.IO_ADDR_W |= BOARD_NAND_ADDR_CHIP0;
351 this->legacy.IO_ADDR_W |= BOARD_NAND_ADDR_CHIPn;
/Linux-v5.15/include/linux/mtd/
Drawnand.h1138 void __iomem *IO_ADDR_W; member