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Searched refs:INVALIDATE_ALL_L1_TLBS (Results 1 – 20 of 20) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/amdgpu/
Dgfxhub_v1_0.c190 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1); in gfxhub_v1_0_init_cache_regs()
Dgfxhub_v2_0.c229 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1); in gfxhub_v2_0_init_cache_regs()
Dgfxhub_v2_1.c232 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1); in gfxhub_v2_1_init_cache_regs()
Dmmhub_v2_0.c304 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1); in mmhub_v2_0_init_cache_regs()
Dmmhub_v2_3.c223 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1); in mmhub_v2_3_init_cache_regs()
Dmmhub_v1_0.c176 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1); in mmhub_v1_0_init_cache_regs()
Dgmc_v7_0.c647 tmp = REG_SET_FIELD(0, VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1); in gmc_v7_0_gart_enable()
Dmmhub_v1_7.c196 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1); in mmhub_v1_7_init_cache_regs()
Dsid.h380 #define INVALIDATE_ALL_L1_TLBS (1 << 0) macro
Dgmc_v8_0.c865 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1); in gmc_v8_0_gart_enable()
Dmmhub_v9_4.c229 INVALIDATE_ALL_L1_TLBS, 1); in mmhub_v9_4_init_cache_regs()
/Linux-v5.15/drivers/gpu/drm/radeon/
Drv770d.h648 #define INVALIDATE_ALL_L1_TLBS (1 << 0) macro
Dnid.h118 #define INVALIDATE_ALL_L1_TLBS (1 << 0) macro
Dsid.h379 #define INVALIDATE_ALL_L1_TLBS (1 << 0) macro
Dcikd.h497 #define INVALIDATE_ALL_L1_TLBS (1 << 0) macro
Devergreend.h1156 #define INVALIDATE_ALL_L1_TLBS (1 << 0) macro
Dni.c1287 WREG32(VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS | INVALIDATE_L2_CACHE); in cayman_pcie_gart_enable()
Dr600d.h593 #define INVALIDATE_ALL_L1_TLBS (1 << 0) macro
Dsi.c4306 WREG32(VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS | INVALIDATE_L2_CACHE); in si_pcie_gart_enable()
Dcik.c5445 WREG32(VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS | INVALIDATE_L2_CACHE); in cik_pcie_gart_enable()