Searched refs:ICL_DPCLKA_CFGCR0_DDI_CLK_OFF (Results 1 – 3 of 3) sorted by relevance
655 tmp |= ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy); in gen11_dsi_gate_clocks()671 tmp &= ~ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy); in gen11_dsi_ungate_clocks()688 if (!(tmp & ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy))) in gen11_dsi_is_clock_enabled()715 val |= ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy); in gen11_dsi_map_pll()717 val &= ~ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy); in gen11_dsi_map_pll()
1504 ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy)); in adls_ddi_enable_clock()1513 ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy)); in adls_ddi_disable_clock()1522 ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy)); in adls_ddi_is_clock_enabled()1658 ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy)); in icl_ddi_combo_enable_clock()1667 ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy)); in icl_ddi_combo_disable_clock()1676 ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy)); in icl_ddi_combo_is_clock_enabled()
10534 #define ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy) (1 << _PICK(phy, 10, 11, 24, 4, 5)) macro
