Home
last modified time | relevance | path

Searched refs:GRBM_GFX_INDEX (Results 1 – 25 of 29) sorted by relevance

12

/Linux-v5.15/drivers/gpu/drm/amd/amdkfd/
Dcik_regs.h69 #define GRBM_GFX_INDEX 0x30800 macro
Dkfd_dbgdev.c653 GRBM_GFX_INDEX / 4 - USERCONFIG_REG_BASE; in dbgdev_wave_control_diq()
677 GRBM_GFX_INDEX / 4 - USERCONFIG_REG_BASE; in dbgdev_wave_control_diq()
/Linux-v5.15/drivers/gpu/drm/amd/amdgpu/
Dgfx_v9_4.c99 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, in gfx_v9_4_select_se_sh()
102 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_INDEX, in gfx_v9_4_select_se_sh()
106 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_BROADCAST_WRITES, in gfx_v9_4_select_se_sh()
109 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_INDEX, se_num); in gfx_v9_4_select_se_sh()
112 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SH_BROADCAST_WRITES, in gfx_v9_4_select_se_sh()
115 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SH_INDEX, sh_num); in gfx_v9_4_select_se_sh()
Damdgpu_amdkfd_gfx_v8.c590 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in kgd_wave_control_execute()
592 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in kgd_wave_control_execute()
594 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in kgd_wave_control_execute()
Dvce_v4_0.c743 WREG32_FIELD(GRBM_GFX_INDEX, INSTANCE_INDEX, 0);
748 WREG32_FIELD(GRBM_GFX_INDEX, INSTANCE_INDEX, 0x10);
753 WREG32_FIELD(GRBM_GFX_INDEX, INSTANCE_INDEX, 0);
935 WREG32_FIELD(GRBM_GFX_INDEX, VCE_INSTANCE, i);
954 WREG32_FIELD(GRBM_GFX_INDEX, VCE_INSTANCE, 0);
Damdgpu_amdkfd_gfx_v10.c725 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in kgd_wave_control_execute()
727 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in kgd_wave_control_execute()
729 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in kgd_wave_control_execute()
Damdgpu_amdkfd_gfx_v9.c676 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in kgd_gfx_v9_wave_control_execute()
678 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in kgd_gfx_v9_wave_control_execute()
680 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in kgd_gfx_v9_wave_control_execute()
Damdgpu_amdkfd_gfx_v10_3.c635 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in wave_control_execute_v10_3()
637 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in wave_control_execute_v10_3()
639 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in wave_control_execute_v10_3()
Dgfx_v9_4_2.c847 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, in gfx_v9_4_2_select_se_sh()
850 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_INDEX, in gfx_v9_4_2_select_se_sh()
854 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_BROADCAST_WRITES, in gfx_v9_4_2_select_se_sh()
857 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_INDEX, se_num); in gfx_v9_4_2_select_se_sh()
860 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SH_BROADCAST_WRITES, in gfx_v9_4_2_select_se_sh()
863 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SH_INDEX, sh_num); in gfx_v9_4_2_select_se_sh()
Dsoc15_common.h150 …m_idx = adev->reg_offset[GC_HWIP][0][prefix##GRBM_GFX_INDEX_BASE_IDX] + prefix##GRBM_GFX_INDEX; \
Dvce_v3_0.c847 WREG32_FIELD(GRBM_GFX_INDEX, VCE_INSTANCE, 0); in vce_v3_0_get_clockgating_state()
Dgfx_v8_0.c3445 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES, 1); in gfx_v8_0_select_se_sh()
3447 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_INDEX, instance); in gfx_v8_0_select_se_sh()
3450 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_BROADCAST_WRITES, 1); in gfx_v8_0_select_se_sh()
3452 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_INDEX, se_num); in gfx_v8_0_select_se_sh()
3455 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SH_BROADCAST_WRITES, 1); in gfx_v8_0_select_se_sh()
3457 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SH_INDEX, sh_num); in gfx_v8_0_select_se_sh()
Dgfx_v9_0.c2481 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES, 1); in gfx_v9_0_select_se_sh()
2483 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_INDEX, instance); in gfx_v9_0_select_se_sh()
2486 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_BROADCAST_WRITES, 1); in gfx_v9_0_select_se_sh()
2488 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_INDEX, se_num); in gfx_v9_0_select_se_sh()
2491 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SH_BROADCAST_WRITES, 1); in gfx_v9_0_select_se_sh()
2493 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SH_INDEX, sh_num); in gfx_v9_0_select_se_sh()
Dsid.h996 #define GRBM_GFX_INDEX 0x200B macro
Dgfx_v6_0.c1307 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES, 1); in gfx_v6_0_select_se_sh()
1309 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_INDEX, instance); in gfx_v6_0_select_se_sh()
Dgfx_v10_0.c5021 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, in gfx_v10_0_select_se_sh()
5024 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_INDEX, in gfx_v10_0_select_se_sh()
5028 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_BROADCAST_WRITES, in gfx_v10_0_select_se_sh()
5031 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_INDEX, se_num); in gfx_v10_0_select_se_sh()
5034 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SA_BROADCAST_WRITES, in gfx_v10_0_select_se_sh()
5037 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SA_INDEX, sh_num); in gfx_v10_0_select_se_sh()
/Linux-v5.15/drivers/gpu/drm/radeon/
Dcypress_dpm.c125 WREG32(GRBM_GFX_INDEX, 0xC0000000); in cypress_gfx_clock_gating_enable()
152 WREG32(GRBM_GFX_INDEX, 0xC0000000); in cypress_gfx_clock_gating_enable()
186 WREG32(GRBM_GFX_INDEX, 0xC0000000); in cypress_mg_clock_gating_enable()
207 WREG32(GRBM_GFX_INDEX, 0xC0000000); in cypress_mg_clock_gating_enable()
Dni.c1082 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in cayman_gpu_init()
1102 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in cayman_gpu_init()
1111 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES); in cayman_gpu_init()
Dnid.h295 #define GRBM_GFX_INDEX 0x802C macro
Dsid.h998 #define GRBM_GFX_INDEX 0x802C macro
Dcikd.h1627 #define GRBM_GFX_INDEX 0x30800 macro
Devergreen.c3466 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in evergreen_gpu_init()
3487 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in evergreen_gpu_init()
3496 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES); in evergreen_gpu_init()
Devergreend.h412 #define GRBM_GFX_INDEX 0x802C macro
/Linux-v5.15/drivers/gpu/drm/radeon/reg_srcs/
Dcayman2 0x0000802C GRBM_GFX_INDEX
Devergreen2 0x0000802C GRBM_GFX_INDEX

12