Searched refs:GPIO_bit (Results 1 – 8 of 8) sorted by relevance
106 PGSR2 |= GPIO_bit(SPITZ_GPIO_KEY_STROBE0); in spitz_presuspend()112 PRER = GPIO_bit(SPITZ_GPIO_KEY_INT); in spitz_presuspend()113 PFER = GPIO_bit(SPITZ_GPIO_KEY_INT) | GPIO_bit(SPITZ_GPIO_RESET); in spitz_presuspend()114 PWER = GPIO_bit(SPITZ_GPIO_KEY_INT) | GPIO_bit(SPITZ_GPIO_RESET) | PWER_RTC; in spitz_presuspend()115 PKWR = GPIO_bit(SPITZ_GPIO_SYNC) | GPIO_bit(SPITZ_GPIO_KEY_INT) | GPIO_bit(SPITZ_GPIO_RESET); in spitz_presuspend()151 if (PEDR & GPIO_bit(SPITZ_GPIO_KEY_INT)) in spitz_should_wakeup()152 is_resume |= GPIO_bit(SPITZ_GPIO_KEY_INT); in spitz_should_wakeup()154 if (PKSR & GPIO_bit(SPITZ_GPIO_SYNC)) in spitz_should_wakeup()155 is_resume |= GPIO_bit(SPITZ_GPIO_SYNC); in spitz_should_wakeup()
54 unsigned long gafr, mask = GPIO_bit(gpio); in __mfp_config_gpio()238 gpio_desc[i].mask = GPIO_bit(i); in pxa25x_mfp_init()324 if (GPIO_bit(i) & 0x1e4) in pxa27x_mfp_init()328 gpio_desc[i].mask = GPIO_bit(i); in pxa27x_mfp_init()358 (GPDR(i) & GPIO_bit(i))) { in pxa2xx_mfp_suspend()359 if (GPLR(i) & GPIO_bit(i)) in pxa2xx_mfp_suspend()360 PGSR(gpio_to_bank(i)) |= GPIO_bit(i); in pxa2xx_mfp_suspend()362 PGSR(gpio_to_bank(i)) &= ~GPIO_bit(i); in pxa2xx_mfp_suspend()379 if ((gpdr_lpm[gpio_to_bank(i)] & GPIO_bit(i)) || in pxa2xx_mfp_suspend()381 (saved_gpdr[gpio_to_bank(i)] & GPIO_bit(i)))) in pxa2xx_mfp_suspend()[all …]
100 if ((PEDR & GPIO_bit(CORGI_GPIO_AC_IN))) { in corgi_should_wakeup()114 if ((PEDR & GPIO_bit(CORGI_GPIO_CHRG_FULL))) in corgi_should_wakeup()117 if (PEDR & GPIO_bit(CORGI_GPIO_KEY_INT)) in corgi_should_wakeup()118 is_resume |= GPIO_bit(CORGI_GPIO_KEY_INT); in corgi_should_wakeup()120 if (PEDR & GPIO_bit(CORGI_GPIO_WAKEUP)) in corgi_should_wakeup()121 is_resume |= GPIO_bit(CORGI_GPIO_WAKEUP); in corgi_should_wakeup()
215 dir = gpdr & GPIO_bit(gpio); in __gpio_is_occupied()223 ret = gpdr & GPIO_bit(gpio); in __gpio_is_occupied()263 uint32_t value, mask = GPIO_bit(offset); in pxa_gpio_direction_input()290 uint32_t tmp, mask = GPIO_bit(offset); in pxa_gpio_direction_output()320 return !!(gplr & GPIO_bit(offset)); in pxa_gpio_get()327 writel_relaxed(GPIO_bit(offset), in pxa_gpio_set()401 unsigned long gpdr, mask = GPIO_bit(gpio); in pxa_gpio_irq_type()407 if ((c->irq_edge_rise | c->irq_edge_fall) & GPIO_bit(gpio)) in pxa_gpio_irq_type()489 writel_relaxed(GPIO_bit(gpio), base + GEDR_OFFSET); in pxa_ack_muxed_gpio()500 b->irq_mask &= ~GPIO_bit(gpio); in pxa_mask_muxed_gpio()[all …]
54 #define CORGI_GPIO_STROBE_BIT(a) GPIO_bit(66+(a))55 #define CORGI_GPIO_SENSE_BIT(a) GPIO_bit(58+(a))
119 #define TOSA_GPIO_STROBE_BIT(a) GPIO_bit(58+(a))120 #define TOSA_GPIO_SENSE_BIT(a) GPIO_bit(69+(a))
5 #define GPIO_bit(x) (1 << ((x) & 0x1f)) macro
159 GPCR(2) = GPIO_bit(2);161 GPSR(2) = GPIO_bit(2);168 GPCR(3) = GPIO_bit(3);170 GPSR(3) = GPIO_bit(3);
