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Searched refs:GENMASK (Results 1 – 25 of 1660) sorted by relevance

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/Linux-v5.15/include/soc/mscc/
Docelot_ana.h15 #define ANA_ANAGEFIL_PID_VAL(x) (((x) << 14) & GENMASK(18, 14))
16 #define ANA_ANAGEFIL_PID_VAL_M GENMASK(18, 14)
17 #define ANA_ANAGEFIL_PID_VAL_X(x) (((x) & GENMASK(18, 14)) >> 14)
19 #define ANA_ANAGEFIL_VID_VAL(x) ((x) & GENMASK(12, 0))
20 #define ANA_ANAGEFIL_VID_VAL_M GENMASK(12, 0)
24 #define ANA_STORMLIMIT_CFG_STORM_RATE(x) (((x) << 3) & GENMASK(6, 3))
25 #define ANA_STORMLIMIT_CFG_STORM_RATE_M GENMASK(6, 3)
26 #define ANA_STORMLIMIT_CFG_STORM_RATE_X(x) (((x) & GENMASK(6, 3)) >> 3)
28 #define ANA_STORMLIMIT_CFG_STORM_MODE(x) ((x) & GENMASK(1, 0))
29 #define ANA_STORMLIMIT_CFG_STORM_MODE_M GENMASK(1, 0)
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Docelot_hsio.h90 #define HSIO_PLL5G_CFG0_SELBGV820(x) (((x) << 23) & GENMASK(26, 23))
91 #define HSIO_PLL5G_CFG0_SELBGV820_M GENMASK(26, 23)
92 #define HSIO_PLL5G_CFG0_SELBGV820_X(x) (((x) & GENMASK(26, 23)) >> 23)
93 #define HSIO_PLL5G_CFG0_LOOP_BW_RES(x) (((x) << 18) & GENMASK(22, 18))
94 #define HSIO_PLL5G_CFG0_LOOP_BW_RES_M GENMASK(22, 18)
95 #define HSIO_PLL5G_CFG0_LOOP_BW_RES_X(x) (((x) & GENMASK(22, 18)) >> 18)
96 #define HSIO_PLL5G_CFG0_SELCPI(x) (((x) << 16) & GENMASK(17, 16))
97 #define HSIO_PLL5G_CFG0_SELCPI_M GENMASK(17, 16)
98 #define HSIO_PLL5G_CFG0_SELCPI_X(x) (((x) & GENMASK(17, 16)) >> 16)
103 #define HSIO_PLL5G_CFG0_CPU_CLK_DIV(x) (((x) << 6) & GENMASK(11, 6))
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Docelot_qsys.h25 #define QSYS_EEE_THRES_EEE_HIGH_BYTES(x) (((x) << 8) & GENMASK(15, 8))
26 #define QSYS_EEE_THRES_EEE_HIGH_BYTES_M GENMASK(15, 8)
27 #define QSYS_EEE_THRES_EEE_HIGH_BYTES_X(x) (((x) & GENMASK(15, 8)) >> 8)
28 #define QSYS_EEE_THRES_EEE_HIGH_FRAMES(x) ((x) & GENMASK(7, 0))
29 #define QSYS_EEE_THRES_EEE_HIGH_FRAMES_M GENMASK(7, 0)
33 #define QSYS_EXT_CPU_CFG_EXT_CPU_PORT(x) (((x) << 8) & GENMASK(12, 8))
34 #define QSYS_EXT_CPU_CFG_EXT_CPU_PORT_M GENMASK(12, 8)
35 #define QSYS_EXT_CPU_CFG_EXT_CPU_PORT_X(x) (((x) & GENMASK(12, 8)) >> 8)
36 #define QSYS_EXT_CPU_CFG_EXT_CPUQ_MSK(x) ((x) & GENMASK(7, 0))
37 #define QSYS_EXT_CPU_CFG_EXT_CPUQ_MSK_M GENMASK(7, 0)
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Docelot_sys.h20 #define SYS_FRM_AGING_MAX_AGE(x) ((x) & GENMASK(19, 0))
21 #define SYS_FRM_AGING_MAX_AGE_M GENMASK(19, 0)
23 #define SYS_STAT_CFG_STAT_CLEAR_SHOT(x) (((x) << 10) & GENMASK(16, 10))
24 #define SYS_STAT_CFG_STAT_CLEAR_SHOT_M GENMASK(16, 10)
25 #define SYS_STAT_CFG_STAT_CLEAR_SHOT_X(x) (((x) & GENMASK(16, 10)) >> 10)
26 #define SYS_STAT_CFG_STAT_VIEW(x) ((x) & GENMASK(9, 0))
27 #define SYS_STAT_CFG_STAT_VIEW_M GENMASK(9, 0)
40 #define SYS_TIMESTAMP_OFFSET_ETH_TYPE_CFG(x) (((x) << 6) & GENMASK(21, 6))
41 #define SYS_TIMESTAMP_OFFSET_ETH_TYPE_CFG_M GENMASK(21, 6)
42 #define SYS_TIMESTAMP_OFFSET_ETH_TYPE_CFG_X(x) (((x) & GENMASK(21, 6)) >> 6)
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Docelot_dev.h17 #define DEV_CLOCK_CFG_LINK_SPEED(x) ((x) & GENMASK(1, 0))
18 #define DEV_CLOCK_CFG_LINK_SPEED_M GENMASK(1, 0)
27 #define DEV_EEE_CFG_EEE_TIMER_AGE(x) (((x) << 15) & GENMASK(21, 15))
28 #define DEV_EEE_CFG_EEE_TIMER_AGE_M GENMASK(21, 15)
29 #define DEV_EEE_CFG_EEE_TIMER_AGE_X(x) (((x) & GENMASK(21, 15)) >> 15)
30 #define DEV_EEE_CFG_EEE_TIMER_WAKEUP(x) (((x) << 8) & GENMASK(14, 8))
31 #define DEV_EEE_CFG_EEE_TIMER_WAKEUP_M GENMASK(14, 8)
32 #define DEV_EEE_CFG_EEE_TIMER_WAKEUP_X(x) (((x) & GENMASK(14, 8)) >> 8)
33 #define DEV_EEE_CFG_EEE_TIMER_HOLDOFF(x) (((x) << 1) & GENMASK(7, 1))
34 #define DEV_EEE_CFG_EEE_TIMER_HOLDOFF_M GENMASK(7, 1)
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/Linux-v5.15/drivers/net/ipa/
Dipa_reg.h70 #define ENABLE_FMASK GENMASK(0, 0)
72 #define RAM_ARB_PRI_CLIENT_SAMP_FIX_DIS_FMASK GENMASK(0, 0)
73 #define GSI_SNOC_BYPASS_DIS_FMASK GENMASK(1, 1)
74 #define GEN_QMB_0_SNOC_BYPASS_DIS_FMASK GENMASK(2, 2)
75 #define GEN_QMB_1_SNOC_BYPASS_DIS_FMASK GENMASK(3, 3)
77 #define IPA_DCMP_FAST_CLK_EN_FMASK GENMASK(4, 4)
79 #define IPA_QMB_SELECT_CONS_EN_FMASK GENMASK(5, 5)
80 #define IPA_QMB_SELECT_PROD_EN_FMASK GENMASK(6, 6)
81 #define GSI_MULTI_INORDER_RD_DIS_FMASK GENMASK(7, 7)
82 #define GSI_MULTI_INORDER_WR_DIS_FMASK GENMASK(8, 8)
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/Linux-v5.15/drivers/net/wireless/mediatek/mt76/mt7603/
Dmac.h6 #define MT_RXD0_LENGTH GENMASK(15, 0)
7 #define MT_RXD0_PKT_TYPE GENMASK(31, 29)
9 #define MT_RXD0_NORMAL_ETH_TYPE_OFS GENMASK(22, 16)
27 #define MT_RXD1_NORMAL_BSSID GENMASK(31, 26)
28 #define MT_RXD1_NORMAL_PAYLOAD_FORMAT GENMASK(25, 24)
31 #define MT_RXD1_NORMAL_MAC_HDR_LEN GENMASK(21, 16)
32 #define MT_RXD1_NORMAL_CH_FREQ GENMASK(15, 8)
33 #define MT_RXD1_NORMAL_KEY_ID GENMASK(7, 6)
57 #define MT_RXD2_NORMAL_SEC_MODE GENMASK(15, 12)
58 #define MT_RXD2_NORMAL_TID GENMASK(11, 8)
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Dregs.h14 #define MT_MCU_PCIE_REMAP_1_OFFSET GENMASK(17, 0)
15 #define MT_MCU_PCIE_REMAP_1_BASE GENMASK(31, 18)
18 #define MT_MCU_PCIE_REMAP_2_OFFSET GENMASK(18, 0)
19 #define MT_MCU_PCIE_REMAP_2_BASE GENMASK(31, 19)
29 #define MT_INT_RX_DONE_ALL GENMASK(1, 0)
30 #define MT_INT_TX_DONE_ALL GENMASK(19, 4)
44 #define MT_WPDMA_GLO_CFG_DMA_BURST_SIZE GENMASK(5, 4)
47 #define MT_WPDMA_GLO_CFG_HDR_SEG_LEN GENMASK(15, 8)
56 #define MT_WPDMA_DEBUG_VALUE GENMASK(17, 0)
58 #define MT_WPDMA_DEBUG_IDX GENMASK(31, 28)
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/Linux-v5.15/drivers/net/wireless/mediatek/mt76/mt7915/
Dmac.h10 #define MT_RXD0_LENGTH GENMASK(15, 0)
11 #define MT_RXD0_PKT_TYPE GENMASK(31, 27)
13 #define MT_RXD0_NORMAL_ETH_TYPE_OFS GENMASK(22, 16)
29 #define MT_RXD1_NORMAL_WLAN_IDX GENMASK(9, 0)
35 #define MT_RXD1_NORMAL_SEC_MODE GENMASK(20, 16)
36 #define MT_RXD1_NORMAL_KEY_ID GENMASK(22, 21)
48 #define MT_RXD2_NORMAL_BSSID GENMASK(5, 0)
51 #define MT_RXD2_NORMAL_MAC_HDR_LEN GENMASK(12, 8)
53 #define MT_RXD2_NORMAL_HDR_OFFSET GENMASK(15, 14)
54 #define MT_RXD2_NORMAL_TID GENMASK(19, 16)
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/Linux-v5.15/drivers/net/wireless/mediatek/mt76/mt7921/
Dmac.h10 #define MT_RXD0_LENGTH GENMASK(15, 0)
11 #define MT_RXD0_PKT_FLAG GENMASK(19, 16)
12 #define MT_RXD0_PKT_TYPE GENMASK(31, 27)
14 #define MT_RXD0_NORMAL_ETH_TYPE_OFS GENMASK(22, 16)
31 #define MT_RXD1_NORMAL_WLAN_IDX GENMASK(9, 0)
37 #define MT_RXD1_NORMAL_SEC_MODE GENMASK(20, 16)
38 #define MT_RXD1_NORMAL_KEY_ID GENMASK(22, 21)
50 #define MT_RXD2_NORMAL_BSSID GENMASK(5, 0)
53 #define MT_RXD2_NORMAL_MAC_HDR_LEN GENMASK(12, 8)
55 #define MT_RXD2_NORMAL_HDR_OFFSET GENMASK(15, 14)
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/Linux-v5.15/drivers/net/wireless/mediatek/mt76/mt7615/
Dmac.h10 #define MT_RXD0_LENGTH GENMASK(15, 0)
11 #define MT_RXD0_PKT_FLAG GENMASK(19, 16)
12 #define MT_RXD0_PKT_TYPE GENMASK(31, 29)
14 #define MT_RXD0_NORMAL_ETH_TYPE_OFS GENMASK(22, 16)
34 #define MT_RXD1_NORMAL_BSSID GENMASK(31, 26)
35 #define MT_RXD1_NORMAL_PAYLOAD_FORMAT GENMASK(25, 24)
36 #define MT_RXD1_FIRST_AMSDU_FRAME GENMASK(1, 0)
41 #define MT_RXD1_NORMAL_MAC_HDR_LEN GENMASK(21, 16)
42 #define MT_RXD1_NORMAL_CH_FREQ GENMASK(15, 8)
43 #define MT_RXD1_NORMAL_KEY_ID GENMASK(7, 6)
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Dregs.h43 #define MT_TOP_OFF_RSV_FW_STATE GENMASK(18, 16)
46 #define MT_TOP_MISC2_FW_STATE GENMASK(2, 0)
48 #define MT7663_TOP_MISC2_FW_STATE GENMASK(3, 1)
55 #define MT_MCU_PCIE_REMAP_1_OFFSET GENMASK(17, 0)
56 #define MT_MCU_PCIE_REMAP_1_BASE GENMASK(31, 18)
60 #define MT_MCU_PCIE_REMAP_2_OFFSET GENMASK(18, 0)
61 #define MT_MCU_PCIE_REMAP_2_BASE GENMASK(31, 19)
84 #define MT7663_MCU_PCIE_REMAP_2_OFFSET GENMASK(15, 0)
85 #define MT7663_MCU_PCIE_REMAP_2_BASE GENMASK(31, 16)
111 #define MT_INT_RX_DONE_ALL GENMASK(1, 0)
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/Linux-v5.15/drivers/media/platform/ti-vpe/
Dcal_regs.h91 #define CAL_HL_REVISION_MINOR_MASK GENMASK(5, 0)
92 #define CAL_HL_REVISION_CUSTOM_MASK GENMASK(7, 6)
93 #define CAL_HL_REVISION_MAJOR_MASK GENMASK(10, 8)
94 #define CAL_HL_REVISION_RTL_MASK GENMASK(15, 11)
95 #define CAL_HL_REVISION_FUNC_MASK GENMASK(27, 16)
96 #define CAL_HL_REVISION_SCHEME_MASK GENMASK(31, 30)
100 #define CAL_HL_HWINFO_WFIFO_MASK GENMASK(3, 0)
101 #define CAL_HL_HWINFO_RFIFO_MASK GENMASK(7, 4)
102 #define CAL_HL_HWINFO_PCTX_MASK GENMASK(12, 8)
103 #define CAL_HL_HWINFO_WCTX_MASK GENMASK(18, 13)
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/Linux-v5.15/drivers/net/wireless/mediatek/mt76/
Dmt76x02_regs.h19 #define MT_EFUSE_CTRL_AOUT GENMASK(5, 0)
20 #define MT_EFUSE_CTRL_MODE GENMASK(7, 6)
21 #define MT_EFUSE_CTRL_LDO_OFF_TIME GENMASK(13, 8)
22 #define MT_EFUSE_CTRL_LDO_ON_TIME GENMASK(15, 14)
23 #define MT_EFUSE_CTRL_AIN GENMASK(25, 16)
54 #define MT_WLAN_FUN_CTRL_GPIO_IN GENMASK(15, 8) /* MT76x0 */
55 #define MT_WLAN_FUN_CTRL_GPIO_OUT GENMASK(23, 16) /* MT76x0 */
56 #define MT_WLAN_FUN_CTRL_GPIO_OUT_EN GENMASK(31, 24) /* MT76x0 */
68 #define MT_XO_CTRL5_C2_VAL GENMASK(14, 8)
71 #define MT_XO_CTRL6_C2_CTRL GENMASK(14, 8)
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/Linux-v5.15/drivers/mtd/nand/raw/
Ddenali.h24 #define LOAD_WAIT_CNT__VALUE GENMASK(15, 0)
27 #define PROGRAM_WAIT_CNT__VALUE GENMASK(15, 0)
30 #define ERASE_WAIT_CNT__VALUE GENMASK(15, 0)
33 #define INT_MON_CYCCNT__VALUE GENMASK(15, 0)
55 #define PREFETCH_MODE__PREFETCH_BURST_LENGTH GENMASK(15, 4)
67 #define TWHR2_AND_WE_2_RE__WE_2_RE GENMASK(5, 0)
68 #define TWHR2_AND_WE_2_RE__TWHR2 GENMASK(13, 8)
72 #define TCWAW_AND_ADDR_2_DATA__ADDR_2_DATA GENMASK(6, 0)
73 #define TCWAW_AND_ADDR_2_DATA__TCWAW GENMASK(13, 8)
76 #define RE_2_WE__VALUE GENMASK(5, 0)
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/Linux-v5.15/drivers/net/wireless/mediatek/mt7601u/
Dregs.h22 #define MT_EFUSE_CTRL_AOUT GENMASK(5, 0)
23 #define MT_EFUSE_CTRL_MODE GENMASK(7, 6)
24 #define MT_EFUSE_CTRL_LDO_OFF_TIME GENMASK(13, 8)
25 #define MT_EFUSE_CTRL_LDO_ON_TIME GENMASK(15, 14)
26 #define MT_EFUSE_CTRL_AIN GENMASK(25, 16)
52 #define MT_WLAN_FUN_CTRL_GPIO_IN GENMASK(15, 8) /* MT76x0 */
53 #define MT_WLAN_FUN_CTRL_GPIO_OUT GENMASK(23, 16) /* MT76x0 */
54 #define MT_WLAN_FUN_CTRL_GPIO_OUT_EN GENMASK(31, 24) /* MT76x0 */
63 #define MT_XO_CTRL5_C2_VAL GENMASK(14, 8)
66 #define MT_XO_CTRL6_C2_CTRL GENMASK(14, 8)
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/Linux-v5.15/drivers/net/wireless/ath/ath11k/
Dhal_desc.h10 #define BUFFER_ADDR_INFO0_ADDR GENMASK(31, 0)
12 #define BUFFER_ADDR_INFO1_ADDR GENMASK(7, 0)
13 #define BUFFER_ADDR_INFO1_RET_BUF_MGR GENMASK(10, 8)
14 #define BUFFER_ADDR_INFO1_SW_COOKIE GENMASK(31, 11)
475 #define HAL_TLV_HDR_TAG GENMASK(9, 1)
476 #define HAL_TLV_HDR_LEN GENMASK(25, 10)
485 #define RX_MPDU_DESC_INFO0_MSDU_COUNT GENMASK(7, 0)
486 #define RX_MPDU_DESC_INFO0_SEQ_NUM GENMASK(19, 8)
573 #define RX_MSDU_DESC_INFO0_MSDU_LENGTH GENMASK(16, 3)
574 #define RX_MSDU_DESC_INFO0_REO_DEST_IND GENMASK(21, 17)
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/Linux-v5.15/drivers/mmc/host/
Dmeson-mx-sdhc.h14 #define MESON_SDHC_SEND_CMD_INDEX GENMASK(5, 0)
22 #define MESON_SDHC_SEND_TOTAL_PACK GENMASK(31, 16)
25 #define MESON_SDHC_CTRL_DAT_TYPE GENMASK(1, 0)
28 #define MESON_SDHC_CTRL_PACK_LEN GENMASK(12, 4)
29 #define MESON_SDHC_CTRL_RX_TIMEOUT GENMASK(19, 13)
30 #define MESON_SDHC_CTRL_RX_PERIOD GENMASK(23, 20)
31 #define MESON_SDHC_CTRL_RX_ENDIAN GENMASK(26, 24)
34 #define MESON_SDHC_CTRL_TX_ENDIAN GENMASK(31, 29)
38 #define MESON_SDHC_STAT_DAT3_0 GENMASK(4, 1)
40 #define MESON_SDHC_STAT_RXFIFO_CNT GENMASK(12, 6)
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/Linux-v5.15/drivers/net/wireless/realtek/rtw88/
Drtw8822c.h135 le32_get_bits(*((__le32 *)(phy_stat) + 0x00), GENMASK(15, 8))
137 le32_get_bits(*((__le32 *)(phy_stat) + 0x04), GENMASK(7, 0))
139 le32_get_bits(*((__le32 *)(phy_stat) + 0x00), GENMASK(21, 16))
141 le32_get_bits(*((__le32 *)(phy_stat) + 0x04), GENMASK(29, 24))
145 le32_get_bits(*((__le32 *)(phy_stat) + 0x00), GENMASK(15, 8))
147 le32_get_bits(*((__le32 *)(phy_stat) + 0x00), GENMASK(23, 16))
149 le32_get_bits(*((__le32 *)(phy_stat) + 0x01), GENMASK(11, 8))
151 le32_get_bits(*((__le32 *)(phy_stat) + 0x01), GENMASK(15, 12))
153 le32_get_bits(*((__le32 *)(phy_stat) + 0x04), GENMASK(7, 0))
155 le32_get_bits(*((__le32 *)(phy_stat) + 0x04), GENMASK(15, 8))
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/Linux-v5.15/drivers/pinctrl/visconti/
Dpinctrl-tmpv7700.c164 VISCONTI_PIN_GROUP(i2c0, REG_PINMUX2, GENMASK(7, 0), 0x00000022),
165 VISCONTI_PIN_GROUP(i2c1, REG_PINMUX2, GENMASK(15, 8), 0x00002200),
166 VISCONTI_PIN_GROUP(i2c2, REG_PINMUX3, GENMASK(23, 16), 0x00770000),
167 VISCONTI_PIN_GROUP(i2c3, REG_PINMUX3, GENMASK(31, 24), 0x77000000),
168 VISCONTI_PIN_GROUP(i2c4, REG_PINMUX4, GENMASK(7, 0), 0x00000077),
169 VISCONTI_PIN_GROUP(i2c5, REG_PINMUX4, GENMASK(15, 8), 0x00007700),
170 VISCONTI_PIN_GROUP(i2c6, REG_PINMUX1, GENMASK(3, 0), 0x0000002),
171 VISCONTI_PIN_GROUP(i2c7, REG_PINMUX5, GENMASK(23, 20), 0x00200000),
172 VISCONTI_PIN_GROUP(i2c8, REG_PINMUX5, GENMASK(31, 24), 0x22000000),
173 VISCONTI_PIN_GROUP(spi0_cs0, REG_PINMUX5, GENMASK(23, 20), 0x00100000),
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/Linux-v5.15/drivers/net/ethernet/mscc/
Docelot_qs.h24 #define QS_XTR_GRP_CFG_MODE(x) (((x) << 2) & GENMASK(3, 2))
25 #define QS_XTR_GRP_CFG_MODE_M GENMASK(3, 2)
26 #define QS_XTR_GRP_CFG_MODE_X(x) (((x) & GENMASK(3, 2)) >> 2)
34 #define QS_XTR_CFG_DP_WM(x) (((x) << 5) & GENMASK(7, 5))
35 #define QS_XTR_CFG_DP_WM_M GENMASK(7, 5)
36 #define QS_XTR_CFG_DP_WM_X(x) (((x) & GENMASK(7, 5)) >> 5)
37 #define QS_XTR_CFG_SCH_WM(x) (((x) << 2) & GENMASK(4, 2))
38 #define QS_XTR_CFG_SCH_WM_M GENMASK(4, 2)
39 #define QS_XTR_CFG_SCH_WM_X(x) (((x) & GENMASK(4, 2)) >> 2)
40 #define QS_XTR_CFG_OFLW_ERR_STICKY(x) ((x) & GENMASK(1, 0))
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Docelot_rew.h13 #define REW_PORT_VLAN_CFG_PORT_TPID(x) (((x) << 16) & GENMASK(31, 16))
14 #define REW_PORT_VLAN_CFG_PORT_TPID_M GENMASK(31, 16)
15 #define REW_PORT_VLAN_CFG_PORT_TPID_X(x) (((x) & GENMASK(31, 16)) >> 16)
17 #define REW_PORT_VLAN_CFG_PORT_PCP(x) (((x) << 12) & GENMASK(14, 12))
18 #define REW_PORT_VLAN_CFG_PORT_PCP_M GENMASK(14, 12)
19 #define REW_PORT_VLAN_CFG_PORT_PCP_X(x) (((x) & GENMASK(14, 12)) >> 12)
20 #define REW_PORT_VLAN_CFG_PORT_VID(x) ((x) & GENMASK(11, 0))
21 #define REW_PORT_VLAN_CFG_PORT_VID_M GENMASK(11, 0)
25 #define REW_TAG_CFG_TAG_CFG(x) (((x) << 7) & GENMASK(8, 7))
26 #define REW_TAG_CFG_TAG_CFG_M GENMASK(8, 7)
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/Linux-v5.15/drivers/net/ethernet/mediatek/
Dmtk_ppe_regs.h40 #define MTK_PPE_IP_PROTO_CHK_IPV4 GENMASK(15, 0)
41 #define MTK_PPE_IP_PROTO_CHK_IPV6 GENMASK(31, 16)
44 #define MTK_PPE_TB_CFG_ENTRY_NUM GENMASK(2, 0)
46 #define MTK_PPE_TB_CFG_SEARCH_MISS GENMASK(5, 4)
53 #define MTK_PPE_TB_CFG_KEEPALIVE GENMASK(13, 12)
54 #define MTK_PPE_TB_CFG_HASH_MODE GENMASK(15, 14)
55 #define MTK_PPE_TB_CFG_SCAN_MODE GENMASK(17, 16)
56 #define MTK_PPE_TB_CFG_HASH_DEBUG GENMASK(19, 18)
79 #define MTK_PPE_TB_USED_NUM GENMASK(13, 0)
82 #define MTK_PPE_BIND_RATE_BIND GENMASK(15, 0)
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/Linux-v5.15/drivers/net/ethernet/stmicro/stmmac/
Ddwxgmac2.h18 #define XGMAC_CONFIG_SS_MASK GENMASK(31, 29)
26 #define XGMAC_CONFIG_SARC GENMASK(22, 20)
33 #define XGMAC_CONFIG_GPSL GENMASK(29, 16)
35 #define XGMAC_CONFIG_HDSMS GENMASK(14, 12)
66 #define XGMAC_VLAN_VID GENMASK(15, 0)
71 #define XGMAC_VLAN_VLC GENMASK(17, 16)
74 #define XGMAC_RXQEN(x) GENMASK((x) * 2 + 1, (x) * 2)
77 #define XGMAC_RQ GENMASK(7, 4)
81 #define XGMAC_PSRQ(x) GENMASK((x) * 8 + 7, (x) * 8)
92 #define XGMAC_PT GENMASK(31, 16)
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/Linux-v5.15/drivers/media/platform/meson/ge2d/
Dge2d-regs.h22 #define GE2D_DST1_8B_MODE_SEL GENMASK(25, 24)
24 #define GE2D_SRC2_8B_MODE_SEL GENMASK(16, 15)
26 #define GE2D_SRC2_PIC_STRUCT GENMASK(13, 12)
28 #define GE2D_SRC1_8B_MODE_SEL GENMASK(6, 5)
31 #define GE2D_SRC1_PIC_STRUCT GENMASK(2, 1)
39 #define GE2D_INTERRUPT_CTRL GENMASK(25, 24)
40 #define GE2D_SRC2_BURST_SIZE_CTRL GENMASK(23, 22)
41 #define GE2D_SRC1_BURST_SIZE_CTRL GENMASK(21, 16)
42 #define GE2D_DST1_PIC_STRUCT GENMASK(15, 14)
43 #define GE2D_SRC_RD_CTRL GENMASK(13, 12)
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