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Searched refs:GEN8_MASTER_IRQ (Results 1 – 4 of 4) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/i915/gvt/
Dinterrupt.c459 DEFINE_GVT_GEN8_INTEL_GVT_IRQ_INFO(master, GEN8_MASTER_IRQ);
473 if (!(vgpu_vreg(vgpu, i915_mmio_reg_offset(GEN8_MASTER_IRQ)) & in gen8_check_pending_irq()
490 if (vgpu_vreg(vgpu, i915_mmio_reg_offset(GEN8_MASTER_IRQ)) in gen8_check_pending_irq()
Dhandlers.c3066 MMIO_DH(GEN8_MASTER_IRQ, D_BDW_PLUS, NULL, in init_bdw_mmio_info()
/Linux-v5.15/drivers/gpu/drm/i915/
Di915_irq.c1725 master_ctl = intel_uncore_read(&dev_priv->uncore, GEN8_MASTER_IRQ) & ~GEN8_MASTER_IRQ_CONTROL; in cherryview_irq_handler()
1746 intel_uncore_write(&dev_priv->uncore, GEN8_MASTER_IRQ, 0); in cherryview_irq_handler()
1772 intel_uncore_write(&dev_priv->uncore, GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL); in cherryview_irq_handler()
2592 raw_reg_write(regs, GEN8_MASTER_IRQ, 0); in gen8_master_intr_disable()
2600 return raw_reg_read(regs, GEN8_MASTER_IRQ); in gen8_master_intr_disable()
2605 raw_reg_write(regs, GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL); in gen8_master_intr_enable()
3236 intel_uncore_write(&dev_priv->uncore, GEN8_MASTER_IRQ, 0); in cherryview_irq_reset()
3237 intel_uncore_posting_read(&dev_priv->uncore, GEN8_MASTER_IRQ); in cherryview_irq_reset()
3902 intel_uncore_write(&dev_priv->uncore, GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL); in cherryview_irq_postinstall()
3903 intel_uncore_posting_read(&dev_priv->uncore, GEN8_MASTER_IRQ); in cherryview_irq_postinstall()
Di915_reg.h7888 #define GEN8_MASTER_IRQ _MMIO(0x44200) macro