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Searched refs:GCC_PCIE_1_PHY_BCR (Results 1 – 19 of 19) sorted by relevance

/Linux-v5.15/include/dt-bindings/reset/
Dqcom,gcc-apq8084.h93 #define GCC_PCIE_1_PHY_BCR 84 macro
/Linux-v5.15/include/dt-bindings/clock/
Dqcom,gcc-sc7280.h212 #define GCC_PCIE_1_PHY_BCR 3 macro
Dqcom,gcc-sdm845.h229 #define GCC_PCIE_1_PHY_BCR 25 macro
Dqcom,gcc-sm8150.h220 #define GCC_PCIE_1_PHY_BCR 7 macro
Dqcom,gcc-sm8250.h224 #define GCC_PCIE_1_PHY_BCR 12 macro
Dqcom,gcc-sm8350.h227 #define GCC_PCIE_1_PHY_BCR 12 macro
Dqcom,gcc-sc8180x.h257 #define GCC_PCIE_1_PHY_BCR 7 macro
Dqcom,gcc-msm8996.h322 #define GCC_PCIE_1_PHY_BCR 82 macro
/Linux-v5.15/drivers/clk/qcom/
Dgcc-apq8084.c3565 [GCC_PCIE_1_PHY_BCR] = { 0x1b80 },
Dgcc-msm8996.c3596 [GCC_PCIE_1_PHY_BCR] = { 0x6d038 },
Dgcc-sc7280.c3495 [GCC_PCIE_1_PHY_BCR] = { 0x8e01c },
Dgcc-sdm845.c3533 [GCC_PCIE_1_PHY_BCR] = { 0x8e01c },
Dgcc-sm8250.c3549 [GCC_PCIE_1_PHY_BCR] = { 0x8e01c },
Dgcc-sm8350.c3758 [GCC_PCIE_1_PHY_BCR] = { 0x8e01c },
Dgcc-sm8150.c3692 [GCC_PCIE_1_PHY_BCR] = { 0x8e01c },
Dgcc-sc8180x.c4497 [GCC_PCIE_1_PHY_BCR] = { 0x8e01c },
/Linux-v5.15/arch/arm64/boot/dts/qcom/
Dmsm8996.dtsi623 resets = <&gcc GCC_PCIE_1_PHY_BCR>;
Dsm8250.dtsi1562 resets = <&gcc GCC_PCIE_1_PHY_BCR>;
Dsdm845.dtsi2169 resets = <&gcc GCC_PCIE_1_PHY_BCR>;