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Searched refs:GCC_PCIE_0_PHY_BCR (Results 1 – 25 of 25) sorted by relevance

/Linux-v5.15/include/dt-bindings/reset/
Dqcom,gcc-apq8084.h91 #define GCC_PCIE_0_PHY_BCR 82 macro
/Linux-v5.15/include/dt-bindings/clock/
Dqcom,gcc-sm6350.h166 #define GCC_PCIE_0_PHY_BCR 7 macro
Dqcom,gcc-qcs404.h166 #define GCC_PCIE_0_PHY_BCR 10 macro
Dqcom,gcc-sc7280.h210 #define GCC_PCIE_0_PHY_BCR 1 macro
Dqcom,gcc-sdm845.h228 #define GCC_PCIE_0_PHY_BCR 24 macro
Dqcom,gcc-sm8150.h218 #define GCC_PCIE_0_PHY_BCR 5 macro
Dqcom,gcc-sm8250.h219 #define GCC_PCIE_0_PHY_BCR 7 macro
Dqcom,gcc-sm8350.h222 #define GCC_PCIE_0_PHY_BCR 7 macro
Dqcom,gcc-msm8998.h270 #define GCC_PCIE_0_PHY_BCR 76 macro
Dqcom,gcc-sc8180x.h255 #define GCC_PCIE_0_PHY_BCR 5 macro
Dqcom,gcc-msm8996.h320 #define GCC_PCIE_0_PHY_BCR 80 macro
/Linux-v5.15/drivers/clk/qcom/
Dgcc-qcs404.c2795 [GCC_PCIE_0_PHY_BCR] = { 0x3e004 },
Dgcc-msm8998.c3077 [GCC_PCIE_0_PHY_BCR] = { 0x6c01c },
Dgcc-apq8084.c3563 [GCC_PCIE_0_PHY_BCR] = { 0x1b00 },
Dgcc-msm8996.c3594 [GCC_PCIE_0_PHY_BCR] = { 0x6c01c },
Dgcc-sc7280.c3493 [GCC_PCIE_0_PHY_BCR] = { 0x6c01c },
Dgcc-sdm845.c3532 [GCC_PCIE_0_PHY_BCR] = { 0x6c01c },
Dgcc-sm8250.c3544 [GCC_PCIE_0_PHY_BCR] = { 0x6c01c },
Dgcc-sm8350.c3753 [GCC_PCIE_0_PHY_BCR] = { 0x6c01c },
Dgcc-sm8150.c3690 [GCC_PCIE_0_PHY_BCR] = { 0x6c01c },
Dgcc-sc8180x.c4495 [GCC_PCIE_0_PHY_BCR] = { 0x6c01c },
/Linux-v5.15/arch/arm64/boot/dts/qcom/
Dmsm8998.dtsi987 resets = <&gcc GCC_PCIE_0_PHY_BCR>, <&gcc GCC_PCIE_PHY_BCR>;
Dmsm8996.dtsi610 resets = <&gcc GCC_PCIE_0_PHY_BCR>;
Dsm8250.dtsi1458 resets = <&gcc GCC_PCIE_0_PHY_BCR>;
Dsdm845.dtsi2059 resets = <&gcc GCC_PCIE_0_PHY_BCR>;