Searched refs:G4X_WM_LEVEL_SR (Results 1 – 2 of 2) sorted by relevance
1099 dev_priv->wm.pri_latency[G4X_WM_LEVEL_SR] = 12; in g4x_setup_wm_latency()1137 case G4X_WM_LEVEL_SR: in g4x_fbc_fifo_size()1231 level = max(level, G4X_WM_LEVEL_SR); in g4x_raw_fbc_wm_set()1308 crtc_state->wm.g4x.raw[G4X_WM_LEVEL_SR].plane[plane_id], in g4x_raw_plane_wm_compute()1314 crtc_state->wm.g4x.raw[G4X_WM_LEVEL_SR].fbc, in g4x_raw_plane_wm_compute()1353 if (level <= G4X_WM_LEVEL_SR) { in g4x_invalidate_wms()1371 if (level < G4X_WM_LEVEL_SR) in g4x_compute_fbc_en()1374 if (level >= G4X_WM_LEVEL_SR && in g4x_compute_fbc_en()1375 wm_state->sr.fbc > g4x_fbc_fifo_size(G4X_WM_LEVEL_SR)) in g4x_compute_fbc_en()1423 level = G4X_WM_LEVEL_SR; in g4x_compute_pipe_wm()[all …]
810 G4X_WM_LEVEL_SR, enumerator