Searched refs:FEATURE_DPM_GFXCLK_BIT (Results 1 – 13 of 13) sorted by relevance
33 #define FEATURE_DPM_GFXCLK_BIT 1 macro68 #define FFEATURE_DPM_GFXCLK_MASK (1 << FEATURE_DPM_GFXCLK_BIT )
72 #define FEATURE_DPM_GFXCLK_BIT 1 macro139 #define FEATURE_DPM_GFXCLK_MASK (1 << FEATURE_DPM_GFXCLK_BIT )
57 #define FEATURE_DPM_GFXCLK_BIT 1 macro129 #define FEATURE_DPM_GFXCLK_MASK (1 << FEATURE_DPM_GFXCLK_BIT )
37 #define FEATURE_DPM_GFXCLK_BIT 1 macro
72 #define FEATURE_DPM_GFXCLK_BIT 1 macro
77 #define FEATURE_DPM_GFXCLK_BIT 1 macro
68 #define FEATURE_DPM_GFXCLK_BIT 1 macro103 #define FEATURE_DPM_GFXCLK_MASK (1 << FEATURE_DPM_GFXCLK_BIT )
68 FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT) | \154 ALDEBARAN_FEA_MAP(SMU_FEATURE_DPM_GFXCLK_BIT, FEATURE_DPM_GFXCLK_BIT),937 (feature_mask & FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT))) { in aldebaran_upload_dpm_level()1004 FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT), in aldebaran_force_clk_levels()1013 FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT), in aldebaran_force_clk_levels()
65 FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT) | \311 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT); in navi10_get_allowed_feature_mask()
66 FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT) | \296 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT); in sienna_cichlid_get_allowed_feature_mask()
307 FEATURE_DPM_GFXCLK_BIT; in vega12_init_dpm_defaults()
342 FEATURE_DPM_GFXCLK_BIT; in vega20_init_dpm_defaults()
378 FEATURE_DPM_GFXCLK_BIT; in vega10_init_dpm_defaults()
