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Searched refs:FACTOR (Results 1 – 25 of 27) sorted by relevance

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/Linux-v5.15/drivers/clk/mediatek/
Dclk-mt8135.c20 FACTOR(CLK_TOP_DSI0_LNTC_DSICLK, "dsi0_lntc_dsiclk", "clk_null", 1, 1),
21 FACTOR(CLK_TOP_HDMITX_CLKDIG_CTS, "hdmitx_clkdig_cts", "clk_null", 1, 1),
22 FACTOR(CLK_TOP_CLKPH_MCK, "clkph_mck", "clk_null", 1, 1),
23 FACTOR(CLK_TOP_CPUM_TCK_IN, "cpum_tck_in", "clk_null", 1, 1),
27 FACTOR(CLK_TOP_MAINPLL_806M, "mainpll_806m", "mainpll", 1, 2),
28 FACTOR(CLK_TOP_MAINPLL_537P3M, "mainpll_537p3m", "mainpll", 1, 3),
29 FACTOR(CLK_TOP_MAINPLL_322P4M, "mainpll_322p4m", "mainpll", 1, 5),
30 FACTOR(CLK_TOP_MAINPLL_230P3M, "mainpll_230p3m", "mainpll", 1, 7),
32 FACTOR(CLK_TOP_UNIVPLL_624M, "univpll_624m", "univpll", 1, 2),
33 FACTOR(CLK_TOP_UNIVPLL_416M, "univpll_416m", "univpll", 1, 3),
[all …]
Dclk-mt7629.c388 FACTOR(CLK_TOP_TO_USB3_SYS, "to_usb3_sys", "eth1pll", 1, 4),
389 FACTOR(CLK_TOP_P1_1MHZ, "p1_1mhz", "eth1pll", 1, 500),
390 FACTOR(CLK_TOP_4MHZ, "free_run_4mhz", "eth1pll", 1, 125),
391 FACTOR(CLK_TOP_P0_1MHZ, "p0_1mhz", "eth1pll", 1, 500),
392 FACTOR(CLK_TOP_ETH_500M, "eth_500m", "eth1pll", 1, 1),
393 FACTOR(CLK_TOP_TXCLK_SRC_PRE, "txclk_src_pre", "sgmiipll_d2", 1, 1),
394 FACTOR(CLK_TOP_RTC, "rtc", "clkxtal", 1, 1024),
395 FACTOR(CLK_TOP_PWM_QTR_26M, "pwm_qtr_26m", "clkxtal", 1, 1),
396 FACTOR(CLK_TOP_CPUM_TCK_IN, "cpum_tck_in", "cpum_tck", 1, 1),
397 FACTOR(CLK_TOP_TO_USB3_DA_TOP, "to_usb3_da_top", "clkxtal", 1, 1),
[all …]
Dclk-mt6779.c25 FACTOR(CLK_TOP_CLK13M, "clk13m", "clk26m", 1, 2),
26 FACTOR(CLK_TOP_F26M_CK_D2, "csw_f26m_ck_d2", "clk26m", 1, 2),
27 FACTOR(CLK_TOP_MAINPLL_CK, "mainpll_ck", "mainpll", 1, 1),
28 FACTOR(CLK_TOP_MAINPLL_D2, "mainpll_d2", "mainpll_ck", 1, 2),
29 FACTOR(CLK_TOP_MAINPLL_D2_D2, "mainpll_d2_d2", "mainpll_d2", 1, 2),
30 FACTOR(CLK_TOP_MAINPLL_D2_D4, "mainpll_d2_d4", "mainpll_d2", 1, 4),
31 FACTOR(CLK_TOP_MAINPLL_D2_D8, "mainpll_d2_d8", "mainpll_d2", 1, 8),
32 FACTOR(CLK_TOP_MAINPLL_D2_D16, "mainpll_d2_d16", "mainpll_d2", 1, 16),
33 FACTOR(CLK_TOP_MAINPLL_D3, "mainpll_d3", "mainpll", 1, 3),
34 FACTOR(CLK_TOP_MAINPLL_D3_D2, "mainpll_d3_d2", "mainpll_d3", 1, 2),
[all …]
Dclk-mt2712.c39 FACTOR(CLK_TOP_SYS_26M, "sys_26m", "clk26m", 1,
41 FACTOR(CLK_TOP_CLK26M_D2, "clk26m_d2", "sys_26m", 1,
46 FACTOR(CLK_TOP_ARMCA35PLL, "armca35pll_ck", "armca35pll", 1,
48 FACTOR(CLK_TOP_ARMCA35PLL_600M, "armca35pll_600m", "armca35pll_ck", 1,
50 FACTOR(CLK_TOP_ARMCA35PLL_400M, "armca35pll_400m", "armca35pll_ck", 1,
52 FACTOR(CLK_TOP_ARMCA72PLL, "armca72pll_ck", "armca72pll", 1,
54 FACTOR(CLK_TOP_SYSPLL, "syspll_ck", "mainpll", 1,
56 FACTOR(CLK_TOP_SYSPLL_D2, "syspll_d2", "syspll_ck", 1,
58 FACTOR(CLK_TOP_SYSPLL1_D2, "syspll1_d2", "syspll_d2", 1,
60 FACTOR(CLK_TOP_SYSPLL1_D4, "syspll1_d4", "syspll_d2", 1,
[all …]
Dclk-mt2701.c58 FACTOR(CLK_TOP_SYSPLL, "syspll_ck", "mainpll", 1, 1),
59 FACTOR(CLK_TOP_SYSPLL_D2, "syspll_d2", "mainpll", 1, 2),
60 FACTOR(CLK_TOP_SYSPLL_D3, "syspll_d3", "mainpll", 1, 3),
61 FACTOR(CLK_TOP_SYSPLL_D5, "syspll_d5", "mainpll", 1, 5),
62 FACTOR(CLK_TOP_SYSPLL_D7, "syspll_d7", "mainpll", 1, 7),
63 FACTOR(CLK_TOP_SYSPLL1_D2, "syspll1_d2", "syspll_d2", 1, 2),
64 FACTOR(CLK_TOP_SYSPLL1_D4, "syspll1_d4", "syspll_d2", 1, 4),
65 FACTOR(CLK_TOP_SYSPLL1_D8, "syspll1_d8", "syspll_d2", 1, 8),
66 FACTOR(CLK_TOP_SYSPLL1_D16, "syspll1_d16", "syspll_d2", 1, 16),
67 FACTOR(CLK_TOP_SYSPLL2_D2, "syspll2_d2", "syspll_d3", 1, 2),
[all …]
Dclk-mt6797.c26 FACTOR(CLK_TOP_SYSPLL_CK, "syspll_ck", "mainpll", 1, 1),
27 FACTOR(CLK_TOP_SYSPLL_D2, "syspll_d2", "mainpll", 1, 2),
28 FACTOR(CLK_TOP_SYSPLL1_D2, "syspll1_d2", "syspll_d2", 1, 2),
29 FACTOR(CLK_TOP_SYSPLL1_D4, "syspll1_d4", "syspll_d2", 1, 4),
30 FACTOR(CLK_TOP_SYSPLL1_D8, "syspll1_d8", "syspll_d2", 1, 8),
31 FACTOR(CLK_TOP_SYSPLL1_D16, "syspll1_d16", "syspll_d2", 1, 16),
32 FACTOR(CLK_TOP_SYSPLL_D3, "syspll_d3", "mainpll", 1, 3),
33 FACTOR(CLK_TOP_SYSPLL_D3_D3, "syspll_d3_d3", "syspll_d3", 1, 3),
34 FACTOR(CLK_TOP_SYSPLL2_D2, "syspll2_d2", "syspll_d3", 1, 2),
35 FACTOR(CLK_TOP_SYSPLL2_D4, "syspll2_d4", "syspll_d3", 1, 4),
[all …]
Dclk-mt8173.c36 FACTOR(CLK_TOP_ARMCA7PLL_754M, "armca7pll_754m", "armca7pll", 1, 2),
37 FACTOR(CLK_TOP_ARMCA7PLL_502M, "armca7pll_502m", "armca7pll", 1, 3),
39 FACTOR(CLK_TOP_MAIN_H546M, "main_h546m", "mainpll", 1, 2),
40 FACTOR(CLK_TOP_MAIN_H364M, "main_h364m", "mainpll", 1, 3),
41 FACTOR(CLK_TOP_MAIN_H218P4M, "main_h218p4m", "mainpll", 1, 5),
42 FACTOR(CLK_TOP_MAIN_H156M, "main_h156m", "mainpll", 1, 7),
44 FACTOR(CLK_TOP_TVDPLL_445P5M, "tvdpll_445p5m", "tvdpll", 1, 4),
45 FACTOR(CLK_TOP_TVDPLL_594M, "tvdpll_594m", "tvdpll", 1, 3),
47 FACTOR(CLK_TOP_UNIV_624M, "univ_624m", "univpll", 1, 2),
48 FACTOR(CLK_TOP_UNIV_416M, "univ_416m", "univpll", 1, 3),
[all …]
Dclk-mt6765.c82 FACTOR(CLK_TOP_SYSPLL, "syspll_ck", "mainpll", 1, 1),
83 FACTOR(CLK_TOP_SYSPLL_D2, "syspll_d2", "mainpll", 1, 2),
84 FACTOR(CLK_TOP_SYSPLL1_D2, "syspll1_d2", "syspll_d2", 1, 2),
85 FACTOR(CLK_TOP_SYSPLL1_D4, "syspll1_d4", "syspll_d2", 1, 4),
86 FACTOR(CLK_TOP_SYSPLL1_D8, "syspll1_d8", "syspll_d2", 1, 8),
87 FACTOR(CLK_TOP_SYSPLL1_D16, "syspll1_d16", "syspll_d2", 1, 16),
88 FACTOR(CLK_TOP_SYSPLL_D3, "syspll_d3", "mainpll", 1, 3),
89 FACTOR(CLK_TOP_SYSPLL2_D2, "syspll2_d2", "syspll_d3", 1, 2),
90 FACTOR(CLK_TOP_SYSPLL2_D4, "syspll2_d4", "syspll_d3", 1, 4),
91 FACTOR(CLK_TOP_SYSPLL2_D8, "syspll2_d8", "syspll_d3", 1, 8),
[all …]
Dclk-mt8183.c32 FACTOR(CLK_TOP_CLK13M, "clk13m", "clk26m", 1, 2),
36 FACTOR(CLK_TOP_F26M_CK_D2, "csw_f26m_ck_d2", "clk26m", 1,
38 FACTOR(CLK_TOP_SYSPLL_CK, "syspll_ck", "mainpll", 1,
40 FACTOR(CLK_TOP_SYSPLL_D2, "syspll_d2", "syspll_ck", 1,
42 FACTOR(CLK_TOP_SYSPLL_D2_D2, "syspll_d2_d2", "syspll_d2", 1,
44 FACTOR(CLK_TOP_SYSPLL_D2_D4, "syspll_d2_d4", "syspll_d2", 1,
46 FACTOR(CLK_TOP_SYSPLL_D2_D8, "syspll_d2_d8", "syspll_d2", 1,
48 FACTOR(CLK_TOP_SYSPLL_D2_D16, "syspll_d2_d16", "syspll_d2", 1,
50 FACTOR(CLK_TOP_SYSPLL_D3, "syspll_d3", "mainpll", 1,
52 FACTOR(CLK_TOP_SYSPLL_D3_D2, "syspll_d3_d2", "syspll_d3", 1,
[all …]
Dclk-mt8192.c28 FACTOR(CLK_TOP_CSW_F26M_D2, "csw_f26m_d2", "clk26m", 1, 2),
32 FACTOR(CLK_TOP_MAINPLL_D3, "mainpll_d3", "mainpll", 1, 3),
33 FACTOR(CLK_TOP_MAINPLL_D4, "mainpll_d4", "mainpll", 1, 4),
34 FACTOR(CLK_TOP_MAINPLL_D4_D2, "mainpll_d4_d2", "mainpll_d4", 1, 2),
35 FACTOR(CLK_TOP_MAINPLL_D4_D4, "mainpll_d4_d4", "mainpll_d4", 1, 4),
36 FACTOR(CLK_TOP_MAINPLL_D4_D8, "mainpll_d4_d8", "mainpll_d4", 1, 8),
37 FACTOR(CLK_TOP_MAINPLL_D4_D16, "mainpll_d4_d16", "mainpll_d4", 1, 16),
38 FACTOR(CLK_TOP_MAINPLL_D5, "mainpll_d5", "mainpll", 1, 5),
39 FACTOR(CLK_TOP_MAINPLL_D5_D2, "mainpll_d5_d2", "mainpll_d5", 1, 2),
40 FACTOR(CLK_TOP_MAINPLL_D5_D4, "mainpll_d5_d4", "mainpll_d5", 1, 4),
[all …]
Dclk-mt7622.c388 FACTOR(CLK_TOP_TO_USB3_SYS, "to_usb3_sys", "eth1pll", 1, 4),
389 FACTOR(CLK_TOP_P1_1MHZ, "p1_1mhz", "eth1pll", 1, 500),
390 FACTOR(CLK_TOP_4MHZ, "free_run_4mhz", "eth1pll", 1, 125),
391 FACTOR(CLK_TOP_P0_1MHZ, "p0_1mhz", "eth1pll", 1, 500),
392 FACTOR(CLK_TOP_TXCLK_SRC_PRE, "txclk_src_pre", "sgmiipll_d2", 1, 1),
393 FACTOR(CLK_TOP_RTC, "rtc", "clkxtal", 1, 1024),
394 FACTOR(CLK_TOP_MEMPLL, "mempll", "clkxtal", 32, 1),
395 FACTOR(CLK_TOP_DMPLL, "dmpll_ck", "mempll", 1, 1),
396 FACTOR(CLK_TOP_SYSPLL_D2, "syspll_d2", "mainpll", 1, 2),
397 FACTOR(CLK_TOP_SYSPLL1_D2, "syspll1_d2", "mainpll", 1, 4),
[all …]
Dclk-mt8167.c32 FACTOR(CLK_TOP_DMPLL, "dmpll_ck", "mempll", 1, 1),
33 FACTOR(CLK_TOP_MAINPLL_D2, "mainpll_d2", "mainpll", 1, 2),
34 FACTOR(CLK_TOP_MAINPLL_D4, "mainpll_d4", "mainpll", 1, 4),
35 FACTOR(CLK_TOP_MAINPLL_D8, "mainpll_d8", "mainpll", 1, 8),
36 FACTOR(CLK_TOP_MAINPLL_D16, "mainpll_d16", "mainpll", 1, 16),
37 FACTOR(CLK_TOP_MAINPLL_D11, "mainpll_d11", "mainpll", 1, 11),
38 FACTOR(CLK_TOP_MAINPLL_D22, "mainpll_d22", "mainpll", 1, 22),
39 FACTOR(CLK_TOP_MAINPLL_D3, "mainpll_d3", "mainpll", 1, 3),
40 FACTOR(CLK_TOP_MAINPLL_D6, "mainpll_d6", "mainpll", 1, 6),
41 FACTOR(CLK_TOP_MAINPLL_D12, "mainpll_d12", "mainpll", 1, 12),
[all …]
Dclk-mt8516.c28 FACTOR(CLK_TOP_DMPLL, "dmpll_ck", "mempll", 1, 1),
29 FACTOR(CLK_TOP_MAINPLL_D2, "mainpll_d2", "mainpll", 1, 2),
30 FACTOR(CLK_TOP_MAINPLL_D4, "mainpll_d4", "mainpll", 1, 4),
31 FACTOR(CLK_TOP_MAINPLL_D8, "mainpll_d8", "mainpll", 1, 8),
32 FACTOR(CLK_TOP_MAINPLL_D16, "mainpll_d16", "mainpll", 1, 16),
33 FACTOR(CLK_TOP_MAINPLL_D11, "mainpll_d11", "mainpll", 1, 11),
34 FACTOR(CLK_TOP_MAINPLL_D22, "mainpll_d22", "mainpll", 1, 22),
35 FACTOR(CLK_TOP_MAINPLL_D3, "mainpll_d3", "mainpll", 1, 3),
36 FACTOR(CLK_TOP_MAINPLL_D6, "mainpll_d6", "mainpll", 1, 6),
37 FACTOR(CLK_TOP_MAINPLL_D12, "mainpll_d12", "mainpll", 1, 12),
[all …]
Dclk-mtk.h48 #define FACTOR(_id, _name, _parent, _mult, _div) { \ macro
/Linux-v5.15/drivers/clk/rockchip/
Dclk-rk3128.c202 FACTOR(PLL_GPLL_DIV2, "gpll_div2", "gpll", 0, 1, 2),
203 FACTOR(PLL_GPLL_DIV3, "gpll_div3", "gpll", 0, 1, 3),
215 FACTOR(SCLK_DDRC, "clk_ddrc", "ddrphy2x", 0, 1, 2),
216 FACTOR(0, "clk_ddrphy", "ddrphy2x", 0, 1, 2),
254 FACTOR(HCLK_VEPU, "hclk_vepu", "aclk_vepu", 0, 1, 4),
347 FACTOR(0, "xin12m", "xin24m", 0, 1, 2),
Dclk-rk3568.c472 FACTOR(0, "clk_osc0_div_375k", "clk_osc0_div_750k", 0, 1, 2),
473 FACTOR(0, "xin_osc0_half", "xin24m", 0, 1, 2),
913 FACTOR(0, "clk_gmac0_tx_div5", "clk_gmac0", 0, 1, 5),
914 FACTOR(0, "clk_gmac0_tx_div50", "clk_gmac0", 0, 1, 50),
915 FACTOR(0, "clk_gmac0_rx_div2", "clk_gmac0", 0, 1, 2),
916 FACTOR(0, "clk_gmac0_rx_div20", "clk_gmac0", 0, 1, 20),
967 FACTOR(0, "clk_gmac1_tx_div5", "clk_gmac1", 0, 1, 5),
968 FACTOR(0, "clk_gmac1_tx_div50", "clk_gmac1", 0, 1, 50),
969 FACTOR(0, "clk_gmac1_rx_div2", "clk_gmac1", 0, 1, 2),
970 FACTOR(0, "clk_gmac1_rx_div20", "clk_gmac1", 0, 1, 20),
[all …]
Dclk-rk3036.c177 FACTOR(0, "xin12m", "xin24m", 0, 1, 2),
189 FACTOR(0, "ddrphy", "ddrphy2x", 0, 1, 2),
356 FACTOR(0, "sclk_macref_out", "hclk_peri_src", 0, 1, 2),
Dclk-rv1108.c464 FACTOR(0, "sclk_cvbs_27m", "sclk_cvbs_host", 0, 1, 2),
498 FACTOR(0, "xin12m", "xin24m", 0, 1, 2),
675 FACTOR(0, "clk_ddr", "clk_ddrphy_src", 0, 1, 2),
Dclk-rk3308.c286 FACTOR(0, "xin12m", "xin24m", 0, 1, 2),
539 FACTOR(0, "clk_mac_rx_tx_div2", "clk_mac_rx_tx", 0, 1, 2),
540 FACTOR(0, "clk_mac_rx_tx_div20", "clk_mac_rx_tx", 0, 1, 20),
Dclk-px30.c271 FACTOR(0, "xin12m", "xin24m", 0, 1, 2),
554 FACTOR(0, "clk_gmac_rx_tx_div2", "clk_gmac_rx_tx", 0, 1, 2),
555 FACTOR(0, "clk_gmac_rx_tx_div20", "clk_gmac_rx_tx", 0, 1, 20),
Dclk.h764 #define FACTOR(_id, cname, pname, f, fm, fd) \ macro
866 FACTOR(_id, cname, pname, 0, 1, 1)
Dclk-rk3228.c415 FACTOR(0, "xin12m", "xin24m", 0, 1, 2),
Dclk-rk3188.c343 FACTOR(0, "xin12m", "xin24m", 0, 1, 2),
Dclk-rk3328.c697 FACTOR(0, "xin12m", "xin24m", 0, 1, 2),
/Linux-v5.15/drivers/gpu/drm/i915/display/
Dintel_panel.c301 #define FACTOR (1 << ACCURACY) in panel_fitter_scaling() macro
302 u32 ratio = source * FACTOR / target; in panel_fitter_scaling()
303 return (FACTOR * ratio + FACTOR/2) / FACTOR; in panel_fitter_scaling()

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