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Searched refs:ENABLE_L2_FRAGMENT_PROCESSING (Results 1 – 23 of 23) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/radeon/
Drv770.c917 WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING | in rv770_pcie_gart_enable()
964 WREG32(VM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING | in rv770_pcie_gart_disable()
994 WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING | in rv770_agp_enable()
Drv770d.h644 #define ENABLE_L2_FRAGMENT_PROCESSING (1 << 1) macro
Dnid.h106 #define ENABLE_L2_FRAGMENT_PROCESSING (1 << 1) macro
Dsid.h371 #define ENABLE_L2_FRAGMENT_PROCESSING (1 << 1) macro
Dcikd.h489 #define ENABLE_L2_FRAGMENT_PROCESSING (1 << 1) macro
Dr600.c1142 WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING | in r600_pcie_gart_enable()
1196 WREG32(VM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING | in r600_pcie_gart_disable()
1234 WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING | in r600_agp_enable()
Devergreen.c2411 WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING | in evergreen_pcie_gart_enable()
2465 WREG32(VM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING | in evergreen_pcie_gart_disable()
2494 WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING | in evergreen_agp_enable()
Devergreend.h1152 #define ENABLE_L2_FRAGMENT_PROCESSING (1 << 1) macro
Dni.c1282 ENABLE_L2_FRAGMENT_PROCESSING | in cayman_pcie_gart_enable()
Dr600d.h589 #define ENABLE_L2_FRAGMENT_PROCESSING (1 << 1) macro
Dcik.c5440 ENABLE_L2_FRAGMENT_PROCESSING | in cik_pcie_gart_enable()
5557 ENABLE_L2_FRAGMENT_PROCESSING | in cik_pcie_gart_disable()
Dsi.c4301 ENABLE_L2_FRAGMENT_PROCESSING | in si_pcie_gart_enable()
/Linux-v5.15/drivers/gpu/drm/amd/amdgpu/
Dgfxhub_v1_0.c180 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING, 1); in gfxhub_v1_0_init_cache_regs()
Dgfxhub_v2_0.c217 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING, 0); in gfxhub_v2_0_init_cache_regs()
Dgfxhub_v2_1.c220 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING, 0); in gfxhub_v2_1_init_cache_regs()
Dmmhub_v2_0.c292 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING, 0); in mmhub_v2_0_init_cache_regs()
Dmmhub_v2_3.c211 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING, 0); in mmhub_v2_3_init_cache_regs()
Dmmhub_v1_0.c166 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING, 1); in mmhub_v1_0_init_cache_regs()
Dgmc_v7_0.c640 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING, 1); in gmc_v7_0_gart_enable()
Dmmhub_v1_7.c186 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING, 1); in mmhub_v1_7_init_cache_regs()
Dsid.h372 #define ENABLE_L2_FRAGMENT_PROCESSING (1 << 1) macro
Dgmc_v8_0.c857 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING, 1); in gmc_v8_0_gart_enable()
Dmmhub_v9_4.c213 ENABLE_L2_FRAGMENT_PROCESSING, 1); in mmhub_v9_4_init_cache_regs()