Searched refs:EMC_XM2CLKPADCTRL (Results 1 – 6 of 6) sorted by relevance
403 0x77fff884 /* EMC_XM2CLKPADCTRL */507 0x77fff884 /* EMC_XM2CLKPADCTRL */611 0x77fff884 /* EMC_XM2CLKPADCTRL */715 0x77fff884 /* EMC_XM2CLKPADCTRL */817 0x77fff884 /* EMC_XM2CLKPADCTRL */920 0x77fff884 /* EMC_XM2CLKPADCTRL */1028 0x77fff884 /* EMC_XM2CLKPADCTRL */1132 0x77fff884 /* EMC_XM2CLKPADCTRL */1236 0x77fff884 /* EMC_XM2CLKPADCTRL */1340 0x77fff884 /* EMC_XM2CLKPADCTRL */[all …]
98 0x77fff884 /* EMC_XM2CLKPADCTRL */202 0x77fff884 /* EMC_XM2CLKPADCTRL */305 0x77fff884 /* EMC_XM2CLKPADCTRL */
371 0x77ffc081 /* EMC_XM2CLKPADCTRL */539 0x77ffc081 /* EMC_XM2CLKPADCTRL */707 0x77ffc081 /* EMC_XM2CLKPADCTRL */875 0x77ffc081 /* EMC_XM2CLKPADCTRL */1043 0x77ffc081 /* EMC_XM2CLKPADCTRL */1211 0x77ffc081 /* EMC_XM2CLKPADCTRL */1379 0x77ffc081 /* EMC_XM2CLKPADCTRL */1547 0x77ffc081 /* EMC_XM2CLKPADCTRL */1715 0x77ffc085 /* EMC_XM2CLKPADCTRL */1883 0x77ffc085 /* EMC_XM2CLKPADCTRL */[all …]
1103 0x77fff884 /* EMC_XM2CLKPADCTRL */1204 0x77fff884 /* EMC_XM2CLKPADCTRL */1305 0x77fff884 /* EMC_XM2CLKPADCTRL */1406 0x77fff884 /* EMC_XM2CLKPADCTRL */1505 0x77fff884 /* EMC_XM2CLKPADCTRL */1605 0x77fff884 /* EMC_XM2CLKPADCTRL */1709 0x77fff884 /* EMC_XM2CLKPADCTRL */1810 0x77fff884 /* EMC_XM2CLKPADCTRL */1911 0x77fff884 /* EMC_XM2CLKPADCTRL */2012 0x77fff884 /* EMC_XM2CLKPADCTRL */[all …]
104 #define EMC_XM2CLKPADCTRL 0x308 macro299 [73] = EMC_XM2CLKPADCTRL,701 writel_relaxed(timing->data[73], emc->regs + EMC_XM2CLKPADCTRL); in emc_prepare_timing_change()
165 #define EMC_XM2CLKPADCTRL 0x308 macro424 EMC_XM2CLKPADCTRL,
