Searched refs:DPLL_VGA_MODE_DIS (Results 1 – 8 of 8) sorted by relevance
| /Linux-v5.15/drivers/gpu/drm/i915/display/ |
| D | intel_dpll.c | 808 dpll = DPLL_VGA_MODE_DIS; in i9xx_compute_dpll() 882 dpll = DPLL_VGA_MODE_DIS; in i8xx_compute_dpll() 1116 DPLL_REF_CLK_ENABLE_VLV | DPLL_VGA_MODE_DIS; in vlv_compute_dpll() 1133 DPLL_REF_CLK_ENABLE_VLV | DPLL_VGA_MODE_DIS; in chv_compute_dpll() 1395 intel_de_write(dev_priv, reg, dpll & ~DPLL_VGA_MODE_DIS); in i9xx_enable_pll() 1548 DPLL_VGA_MODE_DIS) == 0); in chv_enable_pll() 1807 DPLL_REF_CLK_ENABLE_VLV | DPLL_VGA_MODE_DIS; in vlv_disable_pll() 1824 DPLL_REF_CLK_ENABLE_VLV | DPLL_VGA_MODE_DIS; in chv_disable_pll() 1854 intel_de_write(dev_priv, DPLL(pipe), DPLL_VGA_MODE_DIS); in i9xx_disable_pll()
|
| D | intel_display.c | 12660 DPLL_VGA_MODE_DIS | in i830_enable_pipe() 12682 intel_de_write(dev_priv, DPLL(pipe), dpll & ~DPLL_VGA_MODE_DIS); in i830_enable_pipe() 12736 intel_de_write(dev_priv, DPLL(pipe), DPLL_VGA_MODE_DIS); in i830_disable_pipe()
|
| D | intel_display_power.c | 1420 val |= DPLL_REF_CLK_ENABLE_VLV | DPLL_VGA_MODE_DIS; in vlv_display_power_well_init()
|
| /Linux-v5.15/drivers/gpu/drm/gma500/ |
| D | cdv_intel_display.c | 226 REG_WRITE(dpll_reg, DPLL_SYNCLOCK_ENABLE | DPLL_VGA_MODE_DIS); in cdv_dpll_set_clock_cdv() 659 dpll = DPLL_VGA_MODE_DIS; in cdv_intel_crtc_mode_set() 716 REG_WRITE(map->dpll, dpll | DPLL_VGA_MODE_DIS | DPLL_SYNCLOCK_ENABLE); in cdv_intel_crtc_mode_set()
|
| D | psb_intel_display.c | 152 dpll = DPLL_VGA_MODE_DIS; in psb_intel_crtc_mode_set()
|
| D | psb_intel_reg.h | 232 #define DPLL_VGA_MODE_DIS (1 << 28) macro
|
| D | oaktrail_crtc.c | 523 dpll |= DPLL_VGA_MODE_DIS; in oaktrail_crtc_mode_set()
|
| /Linux-v5.15/drivers/gpu/drm/i915/ |
| D | i915_reg.h | 3487 #define DPLL_VGA_MODE_DIS (1 << 28) macro
|